Lead Physical Design Engineer

Posted 2 Days Ago
Be an Early Applicant
Pune, Mahārāshtra, IND
In-Office
Expert/Leader
Automotive • Internet of Things • Mobile • Semiconductor • Industrial
The Role
Lead RTL synthesis and static timing analysis for complex SoC designs at block, subsystem, and SoC levels. Develop SDC constraints, debug setup and hold violations, perform timing sign-off, create STA methodologies and scripts, and collaborate with design, DFT, physical design, and verification teams. Mentor junior engineers and support delivery of next-generation semiconductor products.
Summary Generated by Built In

We are seeking a highly skilled and experienced Synthesis & STA Engineer with ~10 years relevant experience.

This role involves leading and executing RTL Synthesis & Static Timing Analysis (STA) for complex SoC designs of next-generation semiconductor products.
Job Responsibilities
* Lead and perform RTL Synthesis & comprehensive Static Timing Analysis (STA) at the block, sub-system, and SoC levels for cutting-edge semiconductor designs.

* Develop, integrate, and maintain timing constraints (SDC) for various design hierarchies, ensuring accuracy and coverage.
* Identify, debug, and resolve complex timing violations, including setup, hold, and other advanced timing checks (e.g., OCV, AOCV, EMIR, X-talk).
* Collaborate closely with design, DFT, physical design, and verification teams to ensure timing closure and meet project deadlines.
* Develop and implement efficient STA methodologies, flows, and scripts to improve productivity and turnaround time.
* Perform timing sign-off activities and generate comprehensive timing reports for internal and external reviews.
* Mentor and provide technical guidance to junior engineers, fostering a culture of continuous learning and improvement.
* Stay updated with industry trends, best practices, and new technologies in STA and physical design.

More information about NXP in India...

#LI-7013

Skills Required

  • Approximately 10 years of relevant experience in synthesis and static timing analysis engineering
  • Experience leading RTL synthesis and comprehensive STA for complex SoC designs
  • Experience developing and maintaining SDC timing constraints
  • Experience debugging setup, hold, OCV, AOCV, EMIR, and crosstalk timing violations
  • Experience with timing closure, timing sign-off, and timing reporting
  • Experience developing STA methodologies, flows, and scripts
  • Ability to mentor junior engineers and provide technical guidance

NXP Semiconductors Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NXP Semiconductors and has not been reviewed or approved by NXP Semiconductors.

  • Retirement Support — Feedback suggests the 401(k) program is strong, with reports of a 100% match on the first 5% of base salary. This is seen as a solid pillar of the overall rewards package.
  • Equity Value & Accessibility — An employee stock purchase plan with a 15% discount is highlighted as a meaningful benefit. This feature adds perceived long-term value beyond base pay.
  • Healthcare Strength — Medical, dental, and vision coverage alongside HSA/FSA options and wellness incentives are described as comprehensive. These offerings contribute to a sense of robust core benefits.

NXP Semiconductors Insights

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The Company
HQ: Eindhoven
21,993 Employees
Year Founded: 2006

What We Do

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 34,500 employees in more than 30 countries and posted revenue of $13.21 billion in 2022. Find out more at www.nxp.com. Privacy Policy: https://www.nxp.com/company/about-nxp/privacy-policy-for-social-media-pages:PRIVACY-POLICY-SOCIAL-MEDIA

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