Lead Design Engineer

Reposted 6 Days Ago
Be an Early Applicant
Bangalore, Bengaluru Urban, Karnataka, IND
In-Office
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
The Lead Design Engineer will perform design verification of ASICs, create test plans, develop functional coverage, and involve in post-silicon validation in a collaborative environment.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Design verification of ASICs  for Palladium.

  • Position is based in Bangalore
  • Will have to work at IP, Sub-System and SOC level verification.
  • Test plan creation, functional coverage plan and coding of functional coverage bins.
  • Will be involved in post silicon validation/bring up.

Job Requirements:

  • Strong expertise in Verilog, HVL( SV/Specman e) with UVM/OVM/eRM methodology.
  • Experience in functional coverage/code coverage/assertions development and closure.
  • Experience in test plan creation.
  • Exposure to PCIe and LPDDR verification.
  • Strong debug skills
  • Should be process oriented and have a passion for scripting/automation.
  • Should be a good team player
  • Effective cross-team communication and documentation skill is strongly preferred.

Minimal qualification requires BS/MS degree ECE or CS with 4+ years of experience in related fields.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Strong expertise in Verilog, HVL (SV/Specman e) with UVM/OVM/eRM methodology
  • Experience in functional coverage/code coverage/assertions development and closure
  • Experience in test plan creation
  • Exposure to PCIe and LPDDR verification
  • Strong debug skills
  • Process oriented and passion for scripting/automation
  • Good team player
  • Effective cross-team communication and documentation skills

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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