At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Be part of the Cadence DDR PHY IP Front End Design team responsible for -
- Developing firmware for DDR PHY using microcontrollers
- Responsible for developing firmware in C and similar Embedded programming languages typically involving bare-metal programming and developing low-level APIs on Microcontrollers.
- Responsible for collaborating with hardware designers and memory subsystem architects to derive algorithms and implement them.
- Responsible for collaborating with the verification team to deduce firmware-hardware co-verification plan.
- Support debug of firmware-based simulations in hardware behavioral simulations (RTL simulations with firmware for verification)
We’re doing work that matters. Help us solve what others can’t.
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What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
