Lead Design Engineer

Posted 22 Hours Ago
Be an Early Applicant
Pune, Mahārāshtra
Mid level
Cloud • Hardware • Software • Semiconductor
The Role
As a Lead Design Engineer at Cadence, you will leverage your 3+ years of ASIC design and verification experience to tackle complex challenges in the PCIe and storage domains. Your role will involve debugging and effective communication to collaborate with teams.
Summary Generated by Built In

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

3++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain. Good debug skills and good communication skills.

We’re doing work that matters. Help us solve what others can’t.

Top Skills

Asic
Onfi
Pcie
Sd/Emmc
Xspi
The Company
HQ: San Jose, CA
8,216 Employees
On-site Workplace
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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