Lead Design Engineer - Verification

Reposted 3 Days Ago
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Shanghai, Shanghai Municipality, Shanghai, CHN
In-Office
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
The role involves developing verification plans for SOCs, executing verification methodologies, addressing debug issues, and collaborating with engineering teams.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Lead Design Engineer - Verification

Location: Shanghai

Job Responsibilities:

Looking for a skilled VLSI Design Verification Engineer with 3–5 years of hands-on experience to join our team supporting SOC design projects for leading customers. The ideal candidate will collaborate closely with design and verification teams to ensure comprehensive test coverage, robust verification methodology, and seamless project execution. Will play a key role in bridging communication between local teams and global stakeholders. Hands-on experience in any protocol like AMBA, PCIe, USB, MIPI or DDR/LPDDR. ARM/RISC-V Processor integration experience preferred.

  • Develop and execute verification plans for SOC and IP blocks, ensuring design intent and testability.
  • Perform RTL verification using industry-standard methodologies (e.g., UVM, SystemVerilog).
  • Collaborate with design engineers to address complex debug issues and optimize verification strategies.
  • Work closely with customer and internal engineering teams to deliver high-quality support and service.
  • Participate in coverage analysis, regression testing, and closure of verification goals.
  • Contribute to the development and enhancement of verification environments and reusable testbenches.

Requirements:

  • Bachelor’s or Master’s degree in Electrical/Computer Engineering or related field with 3–5 years of experience in VLSI/SOC design verification.
  • Strong expertise in System Verilog, UVM, and Verification tools.
We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Bachelor's or Master's degree in Electrical/Computer Engineering or related field
  • 3-5 years of experience in VLSI/SOC design verification
  • Strong expertise in System Verilog, UVM, and Verification tools
  • Hands-on experience in any protocol like AMBA, PCIe, USB, MIPI or DDR/LPDDR
  • ARM/RISC-V Processor integration experience

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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