Lead Design Engineer ( Layout Design )

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Layout Design (2-14 Years) (Noida/Bangalore/Pune)

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world.

Looking for passionate Layout Design professional. If, interested kindly send your CV along with CTC details & notice period.

Brief of JD is as mentioned below.

Also, PLEASE SEND YOUR UPDATED PROFILE TO [email protected] WHILE APPLYING FOR THE JOB

Work Experience : 2-14 Years

Work Location : Noida/Bangalore/Pune (Pl. suggest your location preference)

The Cadence SerDes IP team is looking to hire outstanding Analog Layout engineers on cutting edge FinFET technologies

You don’t want to miss this opportunity if you are passionate about working on High Speed Analog and Mixed-Signal SerDes IP for Tier-1 customers.

Hands on layout experience in various analog IP like Opamps, Bandgaps, Dataconverters, LDO and PLL etc.

Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,

Knowledge of various analog layout techniques like matching, shielding etc.,

Good understanding of DSM technology methodology, issues etc.,

Having worked on latest technology nodes, 28nm and below, is desired.

Must have good communication skills and should be team player.

Scripting and automation experience is a plus.

Hands on layout experience in various analog IP like High speed Analog (Serdes), Data converters, power management and PLL etc.

Good understanding of DSM technology methodology, issues etc.,

Having worked on latest technology nodes, 28nm and below, is desired.

Regards

K Madhu Prasad (Madhu Reddy)
Hiring Team

[email protected]

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