Lead Customer Engagement Engineer - Voltus

Reposted 14 Hours Ago
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Shanghai, Shanghai Municipality, Shanghai, CHN
In-Office
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
The role focuses on supporting Foundry PDK teams and Design Service teams by enabling EM/IR and thermal signoff technologies, including techfile development and reference flow creation through collaboration and validation of modeling assumptions.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Role Focus

This role primarily supports Foundry PDK teams and Design Service teams by enabling EM/IR and thermal signoff technologies through robust techfile development and reference flow creation.

Key Responsibilities – Foundry PDK Support

• Support foundry PDK teams in development and validation of EM/IR and Thermal techfiles for Voltus and Celsius.

• Define and validate power integrity, EM, and thermal modeling assumptions aligned with foundry signoff requirements.

• Collaborate with PDK, extraction, and signoff teams to ensure tool readiness for advanced-node and 3DIC processes.

Key Responsibilities – Design Service Support

• Develop and maintain design reference flows for EM/IR and thermal signoff used by design service teams.

• Support hierarchical and full-chip signoff flows from early design stages to tape-out.

• Provide flow debugging and convergence support for large SoC and multi-die designs.

Technical Scope

• Static/Dynamic IR drop and EM signoff using Voltus.

• Electro-thermal co-analysis using Voltus and Celsius.

• Advanced-node, chiplet, and 3DIC thermal analysis.

Required Skills

• Strong understanding of EM/IR and thermal fundamentals.

• Experience with UNIX/Linux environments and Tcl/Python scripting.

• Familiarity with digital backend and signoff flows.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Strong understanding of EM/IR and thermal fundamentals
  • Experience with UNIX/Linux environments and Tcl/Python scripting
  • Familiarity with digital backend and signoff flows

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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