Lead Application Engineer

Reposted 2 Days Ago
Be an Early Applicant
Shenzhen, Guangdong, CHN
In-Office
2-8 Annually
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
The Lead Application Engineer will work with Sales to scope solutions, manage technical evaluations, conduct trainings, and provide client support. Expertise in design and verification needed.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Principal Application Engineer (Front-end Verification)

Position Description: 
1.    Work closely with the Sales team to identify and scope opportunities for Cadence SoC Verification solution, simulation Emulation and Acceleration products.
2.    Plan, execute and manage key technical evaluations and benchmark with existing and potential customers.
3.    Train, ramp-up and accompany customer project.
4.    Conduct basic and advanced trainings, presentations and demos as necessary.
5.    Providing technical expertise to address clients’ queries, which need expert involvement.
6.    Aligned closely with corporate engineering and sales/marketing team on customer requirement for product direction/improvement.

Position Requirements:         
Over 2~8 years’ experience in the following areas:
1.    2.Design experience in Verilog/VHDL for IP or SoC chip level.
2.    HW verification with knowledge of System Verilog/VHDL and HDL simulators
3.    FPGA prototyping project experience 
4.    Experience with hardware emulator or accelerator is a big advantage
5.    Advanced Verification Methodology like UVM is a plus
6.    Knowledge of Unix and Linux is highly desired
7.    Strong verbal and written communication skills in English
8.    Strong teamwork skills with good human relationship

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • 2+ years experience in Verilog/VHDL for IP or SoC chip level
  • Experience in HW verification with System Verilog/VHDL
  • FPGA prototyping project experience
  • Experience with hardware emulator or accelerator
  • Knowledge of Unix and Linux
  • Strong verbal and written communication skills in English
  • Strong teamwork skills

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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