IC Physical Layout Engineer

Posted 2 Days Ago
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Malibu, CA
Hybrid
100K-125K Annually
3-5 Years Experience
Computer Vision • Hardware • Machine Learning • Software • Semiconductor
Our technologies operate in space, on aircraft, in automobiles, and in a variety of consumer products.
The Role
The Physical Layout Engineer will perform floor-planning and layout of block and chip-level designs in various semiconductor IC technologies, support full chip integration and mask-reticle assembly, and collaborate with circuit designers to fulfill layout requirements.
Summary Generated by Built In

General Description: 

The Mixed Signal Solutions department at HRL Laboratories is a talented team of scientists and engineers with backgrounds in integrated circuit design, advanced packaging, integration, and testing of systems and subsystems for commercial and government applications. As part of this team, the Physical Design engineer will interact with colleagues, produce layout block designs in various technologies, and support full chip integration and verification while maintaining an efficient work environment.


Essential Duties:

Perform floor-planning and layout of block and chip-level designs in a variety of semiconductor IC technologies.

Support full chip integration and mask-reticle assembly.


Required Skills: 

At least 3 years of experience in physical layout design across a variety of silicon and III-V semiconductor IC technologies. 

Experience with Cadence Virtuoso, Calibre DRC/LVS/LPE, Assura. Must be able to resolve LVS/DRC errors. 

Knowledge of deep sub-micron layout design practices such as metal density rules, transistor, and capacitor matching.

Ability to communicate effectively with circuit designers to flow down layout requirements.

Experience customizing and generating standard cells for automated digital design flows is a bonus.


Required Education: 

BS or MS., Electrical Engineering, Computer Science, or Related Discipline


Special Requirements:

U.S. citizenship is required.

Must be able to obtain and maintain a security clearance. Active SSBI is a plus.


Compensation:

The base salary range for this full-time position is $99,705 - $124,683 + bonus + benefits.

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range during the hiring process. Please note that the compensation details listed reflect the base salary only, and do not include potential bonus or benefits.



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Cadence Virtuoso

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The Company
HQ: Malibu, CA
850 Employees
Hybrid Workplace
Year Founded: 1997

What We Do

HRL's scientists and engineers are on the leading edge of technology, conducting pioneering research, providing real-world technology solutions, and advancing the state of the art. We continue to be recognized as one of the world's premier physical science and engineering research laboratories.

Why Work With Us

Our success is the result of our collaborative team of researchers, many of whom are the leading experts in their fields. Through their insights in support for our customers, we are finding the unique opportunities in technology.

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HRL Laboratories Offices

Hybrid Workspace

Employees engage in a combination of remote and on-site work.

Hybrid Policy is role specific.

Typical time on-site: Flexible
HQMalibu, CA
Calabasas, CA
Camarillo, CA
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