IC DESIGN ENGINEER

Reposted 2 Days Ago
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San Jose, CA
In-Office
120K-192K Annually
Senior level
Semiconductor
The Role
The IC Design Engineer is responsible for the design, verification, and documentation for ASIC development, focusing on physical design, PnR, and power analysis while using scripting languages for automation.
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Job Description:

ASIC/Layout Design Engineer: Oversees definition, design, verification, and documentation for ASIC development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. May also review vendor capability to support development. - Knowledge:  Having broad expertise or unique knowledge, uses skills to contribute to development of company objectives and principles and to achieve goals in creative and effective ways.  Barriers to entry such as technical committee review exist at this level.  - Job Complexity:  Works on significant and unique issues where analysis of situations or data requires an evaluation of intangibles.  Exercises independent judgment in methods, techniques and evaluation criteria for obtaining results.  Creates formal networks involving coordination among groups.  - Supervision:  Acts independently to determine methods and procedures on new or special assignments.  May supervise the activities of others.

Hiring Requirements

Job Details

This position is responsible for, but not limited to, the following job duties:

  • Work as part of a physical design team implementing chips from netlist to GDSii with good understanding of the technology elements as well as design flow in all stages.

  • Responsible for floorplanning, design partition and block pin assignment.

  • Perform blocks PnR, timing closure, physical verification.

  • Perform blocks IR/EM analysis. Experience with chip level IR/EM analysis is a big plus.

  • Familiar with scripting languages such as tcl, perl and python. Write scripts to automate physical design flow and make it more efficient.

  • Expertise on low power IC design is desirable.

  • Good knowledge on physical verification using Mentor’s Calibre tool. 

Minimum requirements: Bachelor’s degree and 8+ years of related experience or Master's degree with 5+ years of experience.

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $120,000 - $192,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Asic
Gdsii
Mentor Calibre
Perl
Python
Tcl
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The Company
HQ: San Jose, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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