IC Design Engineer (STA)

Posted 5 Days Ago
Be an Early Applicant
4 Locations
In-Office
120K-192K Annually
Senior level
Semiconductor
The Role
The role involves developing timing constraints, performing static timing analysis, and ensuring timing closure for complex IP and ASIC blocks. Responsibilities include automating processes and guiding clock tree synthesis.
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Job Description:

Broadcom is looking for a senior STA engineer. In this role, you will be contributing to constraint development, constraint validation and timing closure of mission critical IP and ASIC blocks in advanced technology nodes

Responsibilities Include:

  • Develop and validate timing constraints for intricate SoC designs.

  • Perform static timing analysis (STA) using industry-standard tools (e.g., PrimeTime, Tempus).

  • Define and implement timing signoff methodologies, including process corners, derates, and uncertainties.

  • Conduct pre-route timing checks and quality of results (QoR) analysis.

  • Automate timing analysis processes using scripting languages such as Tcl or Perl.

  • Provide guidance on clock tree synthesis and optimization for energy-efficient designs.

  • Ensure compliance with timing signoff checklists and criteria.

  • Generate timing ECO's for timing closure

  • Drive timing closure for complex IP and ASIC blocks

Qualifications:

  • Experience with high-complexity silicon in advanced technology nodes.

  • Familiarity with timing constraint development for hierarchical designs.

  • Knowledge of clock tree planning and implementation for SoCs.

  • Experience with timing ECO creation and final timing signoff.

  • Proficiency in using STA tools (e.g., PrimeTime, TCM, Tempus) and scripting languages (e.g., Tcl, Perl).

  • Proficiency in using synthesis tools (DC-T, Genus) 

  • Strong understanding of ASIC design flows, including RTL and place-and-route.

  • Excellent problem-solving skills and attention to detail.

  • Effective communication and teamwork abilities.

  • Bachelors and 8+ years of related experience; at this level post-graduate coursework may be desirable or Masters degree and 6+ years of related experience or PhD and 3+ years of related experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $120,000 - $192,000. 

 

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Dc-T
Genus
Perl
Primetime
Tcl
Tempus
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The Company
HQ: San Jose, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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