I/O Design Engineer

Posted One Month Ago
Be an Early Applicant
Chandler, AZ, USA
In-Office
110K-176K Annually
Senior level
Software • Semiconductor • Manufacturing
The Role
Design and verify CMOS I/Os and analog/mixed-signal blocks (bandgap references, op-amps, comparators, POR). Run SPICE/Spectre simulations for AC/DC, SI, jitter, and power. Perform transistor reliability/EM/IR analysis, build Verilog/Liberty/IBIS models, collaborate with layout for physical design and verification, produce technical documentation, and support chip integration and silicon bring-up.
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Job Description:

Role Overview

Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design and verification of a broad range of IP and I/Os, including leading-edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly collaborative culture, the role offers opportunities for growth and development.

Responsibilities

  • Design of CMOS I/O, high-precision bandgap references, op-amps, comparators and power-on-reset circuits.
  • Run simulations to validate AC/DC performance, signal integrity, jitter and power.
  • Perform transistor reliability and EMIR analysis.
  • Work closely with layout teams to oversee physical design and verification.
  • Build Verilog, Synopsys Liberty and IBIS models.
  • Create and maintain detailed technical documentation, including datasheets, application notes and integration guides.
  • Support chip-level integration and silicon bring-up in test chips and customer products.

Technical Skills and Requirements

  • MS or PhD in Electrical Engineering.
  • 6+ years of I/O or analog circuit design experience.
  • Deep proficiency in Cadence Virtuoso Schematic/Layout capture and SPICE/Spectre circuit simulation.
  • Solid foundation in I/O protocols including GPIO, I2C, I3C, eMMC, RGMII and SPMI.
  • Familiarity with ESD, Latch-up, EMI and Signal Integrity.
  • Experience with advanced CMOS FinFET and GAA process nodes, including features, technology limitations and PPA tradeoffs.

Compensation and Benefits


The annual base salary range for this position is USD 109,700.00 To USD 175,500.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • MS or PhD in Electrical Engineering
  • 6+ years of I/O or analog circuit design experience
  • Proficiency with Cadence Virtuoso schematic/layout capture
  • Proficiency with SPICE/Spectre circuit simulation
  • Experience building Verilog, Synopsys Liberty and IBIS models
  • Solid foundation in I/O protocols: GPIO, I2C, I3C, eMMC, RGMII, SPMI
  • Familiarity with ESD, latch-up, EMI and signal integrity
  • Experience with advanced CMOS FinFET and GAA process nodes
  • Ability to perform transistor reliability and EM/IR analysis

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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