HW Security Engineer

Posted Yesterday
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2 Locations
Hybrid
Mid level
Big Data • Internet of Things • Software
The Role
Architect and develop secure ASIC and silicon IP, including post-quantum cryptography accelerators, random number generators, and cryptographic cores. Responsibilities include researching security techniques, contributing to architecture and design, collaborating with software and security teams, supporting product certification, improving quality and safety, and ensuring compliance with engineering standards. The role requires digital design and front-end ASIC expertise, with knowledge of cryptography, side-channel attacks, back-end flows, DFT, and hardware development in Unix/Linux environments.
Summary Generated by Built In
Overview

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional ASIC Security Engineer to join our Security IP team in the Netherlands (Vught or Rotterdam, NL). Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. 


As an ASIC Security Engineer, you’ll play a pivotal role in architecting and developing security IPs including post-quantum crypto accelerators, random number generators and various other crypto cores. In this full-time role, you’ll report directly to our Security Engineering Manager. Silicon IP team is dedicated to design with Rambus’s quality standard and awareness of safety and security while maintaining the high configurability of the product.  



Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.  

Responsibilities
  • Research, invent and patent/publish new techniques in the field of security. 
  • Work closely with the system architects to contribute to the architecture and design of various crypto cores. 
  • Cooperate with the software team, product managers, security experts and other stakeholders to support the current and next generation security products and their certification effort. 
  • Drive design improvements for continuous product quality and safety. 
  • Assure the delivered product and documentation adheres to Rambus quality and safety standards. 
Qualifications
  • Experience/Skills 
  • MS/PhD degree in electrical or computer engineering required. 
  • 4 plus years working on secure hardware design, a PhD degree may substitute the work experience requirement  
  • Demonstrated proficiency in Verilog/(or VHDL) and digital design. 
  • Familiarity with front-end ASIC design flows, including design, synthesis, timing analysis, logical equivalence checking, and linting/rule checking 
  • Expertise in some or all of the following areas is beneficial: 
  • Cryptographic algorithms and side-channel attacks  
  • Experience with back-end flows, especially place-and-route 
  • DFT, especially testing and characterization and/or Logic BIST methodologies. 
  • Hardware development experience in UNIX/Linux environments, including supporting tasks such as shell scripting and basic Perl scripts. 
  • Tools/Technologies 
  • Verilog (or VHDL), SystemVerilog, Perl 
  • Shell scripting, Python, Tcl 
  • Xilinx Vivado, 
  • Unix, Linux 
  • Front-end ASIC design tools, such as 
  • Synopsys Design Compiler 
  • Cadence Genus 
  • Synopsys Spyglass 
  • Cadence Conformal(-LP) 
  • ASIC simulation/verification tools, such as 
  • Cadence Xcelium 
  • Synopsys Verdi 
  • Mentor Questa Formal Verification 

About Rambus 

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems. 


Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits. 


At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work. 


Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. 


Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. 

Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. 

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/. 


#LI-HYBRID

#LI-RF1

Skills Required

  • MS or PhD degree in Electrical Engineering or Computer Engineering
  • At least 4 years of experience in secure hardware design; a PhD may substitute for this experience
  • Demonstrated proficiency in Verilog or VHDL and digital design
  • Familiarity with front-end ASIC design flows, including design, synthesis, timing analysis, logical equivalence checking, and linting or rule checking
  • Experience with hardware development in Unix/Linux environments
  • Experience with shell scripting and basic Perl scripting
  • Knowledge of cryptographic algorithms and side-channel attacks
  • Experience with back-end ASIC flows, particularly place-and-route
  • Experience with DFT, testing and characterization, or Logic BIST methodologies
  • Experience with SystemVerilog, Python, Tcl, Xilinx Vivado, and ASIC design or simulation tools
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The Company
HQ: San Jose, CA
989 Employees

What We Do

Dedicated to making data faster and safer, Rambus creates innovative hardware, software and services that drive technology advancements from the data center to the mobile edge. Our architecture licenses, IP cores, chips, software, and services span memory and interfaces, security, and emerging technologies to positively impact the modern world. We collaborate with the industry, partnering with leading chip and system designers, foundries, and service providers. Integrated into tens of billions of devices and systems, our products and technologies power and secure diverse applications, including Big Data, Internet of Things (IoT) security and much more!

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