GPU Design Verification Engineer

Job Details:

Job Description: 

We are looking for a seasoned professional GPU Design Verification Engineer to join our GPU IP team. In this role, you will be responsible to Plan, design complex structures, lead the design and verification efforts of complex logic blocks and features. You will be responsible for defining design and verification strategy, architecting testbenches. 

Key Responsibilities

• Planning, Designing complex architecture designs meeting all performance criteria, Verification strategies and leading complex projects and debugging.

• Work closely with architects and micro-architecture teams to define functional verification strategies and execute comprehensive test plans.

• Develop scalable and reusable IP verification plans, test benches, and architectures to meet graphics microarchitecture specifications.

• Independently own the development of test environments, feature verification, and functional coverage closure.

• Perform debugging and issue replication, root cause analysis, and corrective action in pre-silicon environments.

• Validate design functionality by executing system simulations, analyzing power and timing, and uncovering bugs.

• Utilize assertion-based verification techniques to strengthen reliability metrics.

• Collaborate with GPU design and verification teams to enhance infrastructure and methodologies for continuous improvement.

• Drive technical reviews and documentation of verification strategies and plans.

• Effective communication skills, teamwork abilities, and a mindset of continuous learning.

• Expert knowledge of the GPU pipeline

• Mastery of Verilog, System Verilog, and Logic Synthesis for high-frequency, low-power designs

• Thorough understanding of cache coherency, memory interfaces, etc. 

• Ability to work independently and manage complex tasks with minimal supervision.

Qualifications:

Minimum Qualifications

• Bachelor's degree in electrical engineering, Computer Engineering, Computer Science, or related field, plus 3+ years of relevant experience; or Master's degree with 2+ years of relevant experience; or PhD with 1+ years of relevant experience.

• 4+ years in ASIC Design and verification.

Experience in the following:

• System Verilog coding and UVM verification

• Assertion-based verification methodologies

• Industry standard protocols such as AMBA, PCIe, USB, etc.

• Simulation tools (VCS, Xcelium, Questa)

• Constrain random testing and assertions 

• Leading teams, mentoring juniors and driving milestones.

• Simulation debugging, code coverage closure, and functional coverage analysis.

Preferred Qualifications

• Experience in high performance data center, AI tools or advanced process nodes. 

• Contribution to industry standards

• Proficiency in Python or similar scripting languages

• Familiarity with silicon bring up and post- silicon debugging. 

• Proficiency in C/ C++

• Expertise in architecting plans for complex IP structures 

• Expert experience in the development of feature verification test benches and execution of functional coverage closure.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, California, Folsom

Additional Locations:

Business group:At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.