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CesiumAstro creates out-of-the-box communication systems for space and airborne platforms.
The Role
Develop and maintain FPGA/digital verification infrastructure and UVMf testbenches, integrate DPI-C with MATLAB/Python models, build reusable VIPs, support CI/regression and HIL testing, mentor engineers, evaluate Xilinx TLM/QEMU integration, and work with vendors on simulation models.
Summary Generated by Built In
Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.
At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.
We are looking to add a Verification Engineer II to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you.
JOB DUTIES AND RESPONSIBILITIES
- Contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure.
- Contribute to the development, maintenance and phased deployment of continuous integration and regression testing infrastructure.
- Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models.
- Lead the development of reusable custom VIP modules.
- Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing MATLAB and Python models.
- Aid the Lead Verification Engineer in evaluating current processes regarding FPGA and digital design with a focus on Xilinx TLM models and QEMU-RP integration.
- Work closely with vendors to define requirements of future simulation model deliverables.
- Maintain up-to-date knowledge of industry best-practices regarding FPGA and digital design methodologies.
- Work closely with the engineering leadership team to evaluate and non-disruptively implement process improvements.
JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS
- A Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering.
- Minimum of 2 years of industry experience in verification and automation.
- Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP.
- Understanding of digital design automation infrastructure, including CI, regression testing and HIL testing.
- Competency with Linux.
- Knowledge of vendor-provided FPGA development tools with a focus on Xilinx tools.
CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.
CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.
Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.
Skills Required
- Bachelor’s or Master’s in Computer Science, Electrical Engineering, or Computer Engineering
- Minimum of 2 years industry experience in verification and automation
- Experience with VHDL, Verilog, and SystemVerilog
- Proficiency in C/C++
- Experience with SystemC
- Experience with UVM/UVMf and developing UVMf testbenches
- Experience with DPI-C integration and TLM methodologies
- Familiarity with Formal CDC and functional analysis techniques
- Experience with QEMU (including QEMU-RP) and VIP development
- Competency with Linux
- Understanding of CI, regression testing, and HIL testing infrastructure
- Knowledge of vendor FPGA development tools, with focus on Xilinx tools
- Authorization status: U.S. citizen, lawful permanent resident, conditional resident, asylee/refugee, or eligible to obtain required Dept. of State authorizations
CesiumAstro Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about CesiumAstro and has not been reviewed or approved by CesiumAstro.
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Healthcare Strength — Health coverage includes medical, dental, vision, life and disability insurance, plus FSAs and mental health benefits. Feedback suggests the health package is comprehensive for a growth-stage aerospace firm.
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Retirement Support — Offerings include a 401(k) with company matching and other retirement-plan elements. Feedback suggests core retirement mechanisms are in place alongside standard financial benefits.
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Leave & Time Off Breadth — Generous PTO, paid holidays, paid sick days, and bereavement leave are included. Feedback suggests time-off options are broad on paper across multiple leave types.
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The Company
What We Do
We build high-throughput, plug-and-play phased array communication payloads for space and airborne platforms. CesiumAstro’s full-stack, multi-mission hardware and software products enable a diverse range of commercial and defense objectives. Full-system engineering design is at the heart of every CesiumAstro product. We deliver high-performance solutions under rapid development timelines.
Why Work With Us
At CesiumAstro, we’re a team. We’re passionate, respectful, and determined colleagues ready to help at a moment’s notice. We’re mentors excited to enable our peers with the knowledge they need to succeed. Together, we’re visionaries committing to building memories that will last a lifetime.
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