Emulation Lead

About Etched

Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents.

Job Summary

We're looking for a senior technical leader to build and lead the emulation function from the ground up. As Emulation Lead, you will own the full lifecycle of emulation—from strategy and infrastructure to scheduling and execution. You’ll act as the bridge between hardware design, verification, and software teams, ensuring emulation is a reliable, high-throughput pathway for validating RTL, enabling software bring-up, and accelerating silicon readiness. This role is hands-on where needed, but strategic by default: you’ll drive scheduling discipline, scale tools and processes, and set the technical and operational standards that allow the entire organization to move faster with confidence.

Key responsibilities

• Architect and lead the emulation roadmap for state of the art, very large transformer ASICs, and multi-system Pods.

• Lead planning, platform bring-up execution, and work with senior program managers to track and debug emulation infrastructure programs.

• Own emulation scheduling across teams: define priorities, unblock bottlenecks, and maintain tight coordination with RTL, DV, and software groups.

• Build robust infrastructure using Python, Bash, and vendor tools to manage builds, job queues, debug artifacts, and execution pipelines.

• Establish scalable systems for running, logging, and reproducing emulation tasks across high-throughput environments.

• Partner with hardware and systems leads to align emulation milestones with architectural validation, pre-silicon software bring-up, and performance testing.

• Drive operational rigor across all emulation workflows, ensuring strong SLAs for test coverage, debug velocity, and platform uptime.

• Directly engage in infrastructure design, issue triage, and process improvements to maximize team-wide productivity.

• Collaborate with vendor partners (e.g., Synopsys Zebu) to fine-tune capacity utilization, debug visibility, and throughput efficiency.

• Mentor engineers across software and hardware domains on emulation practices, platform usage, and test integration.

You may be a good fit if you have

• 10+ years of experience in emulation, pre-silicon validation, or system infrastructure for silicon development.

• Proven track record managing emulation schedules and infrastructure across multiple teams and high-throughput environments.

• Strong proficiency in Python and Bash for build flows, automation, orchestration, and diagnostic tooling.

• Extensive experience with emulation frameworks like Synopsys Zebu (preferred), Veloce, Palladium, or Protium for in-circuit emulation or system-level testing.

• Deep familiarity with emulation tools and workflows (e.g., job control, queue management such as Slurm, run/debug automation, etc.).

• Experience leading cross-functional teams through complex, ambiguous execution phases — especially across RTL, DV, and software domains.

• A bias toward action, ownership, and continuously improving the velocity and reliability of technical workflows.

Strong candidates may also have experience with

• SystemVerilog and/or C++ — especially for developing DPI-based transactors, monitors, or hybrid testbenches.

• Waveform debugging and visibility tools such as Verdi, VCS, or SimVision.

• Software-hardware co-validation, silicon correlation workflows, or software-driven pre-silicon performance testing.

• Designing or maintaining hybrid emulation setups to support both functional and performance validation.

Benefits

• Full medical, dental, and vision packages, with generous premium coverage

• Housing subsidy of $2,000/month for those living within walking distance of the office

• Daily lunch and dinner in our office

• Relocation support for those moving to West San Jose

Compensation Range

• $200,000 - $275,000

How we’re different

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in West San Jose, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.