Jobs at Etched

Coordinate high-volume interviews across multiple teams, manage urgent scheduling changes, and ensure a strong candidate and interviewer experience. Maintain recruiting operations, improve coordination processes, support onboarding logistics, coordinate welcome gifts and shipments, and keep hiring data accurate. Partner closely with recruiters, hiring managers, candidates, interviewers, and People Operations in a fast-paced, fully in-person environment.

Build and deploy production-level solutions for Etched’s critical engineering challenges. Projects may include internal hardware tools, manufacturing execution systems, or agentic AI systems for R&D. The intern will own a project from scoping through production, working across full-stack engineering, infrastructure, and product development in a fast-paced, ambiguous environment.

Perform hands-on lab operations for frontier AI hardware, including running test stations, assembling and reworking hardware, cabling racks, managing inventory, and maintaining reliable day-to-day test operations. The role is fully in-person in San Jose, includes repetitive precision work, and may involve evening or weekend availability. Interns may take on engineering work over time.

Designs complex IC substrate packages for high-power AI processors and accelerators, including large multilayer layouts, dense routing, power delivery networks, and signaling beyond 50GHz. The role optimizes CoWoS interposer designs, performs DRC and LVS verification, collaborates with silicon, SI/PI, packaging, and manufacturing teams, and supports design reviews and technical guidance for junior engineers.

Manage and maintain Allegro schematic symbol and PCB footprint libraries. Create, validate, and organize accurate, manufacturable ECAD components; maintain metadata, part numbering, approvals, and datasheet links. Collaborate with electrical, layout, manufacturing, and supplier teams to resolve library issues, meet IPC, JEDEC, and DFM requirements, and improve fabrication yield. Perform quality checks and use version control and SKILL scripting to preserve data integrity and automate library tasks.

Coordinates inbound and outbound international shipments from pickup through delivery, maintaining accurate ERP and inventory records. Monitors transit times, delivery performance, costs, and exceptions; works with freight forwarders, customs brokers, warehouses, suppliers, and contract manufacturers to resolve issues. Reviews shipping documentation, supports inventory control, builds recurring logistics reports, and improves SOPs and processes. The role requires knowledge of Taiwan import/export operations, international freight, Incoterms, and professional English and Mandarin proficiency.

Own block- and subsystem-level physical design from RTL synthesis through GDSII sign-off. Perform floorplanning, placement, CTS, routing, timing closure, sign-off (EM/IR/RC/DRC/LVS), generate abstracts for hierarchical integration, improve PPA with RTL collaboration, and supervise third-party delivery.

Lead external financial reporting and equity accounting, including stock-based compensation, EPS/dilution, SEC filings (10-Q/10-K), XBRL tagging, auditor coordination, SOX controls, and selection/implementation of reporting systems to build scalable reporting infrastructure.

Design and validate power delivery networks for high-current ASIC systems: perform PDN pre/post-layout analysis, DC IR-drop and AC impedance simulations, VRM modeling, thermal co-simulation, DRC/PI checks, bring-up debug, and maintain simulation-to-hardware correlation.

The Physical Design Engineer will focus on block-level implementation, timing closure, PPA optimization, and supervising outsourced design work while improving design flows.

The Technical Program Manager will oversee program delivery, align teams, manage vendor relationships, and optimize processes in the Infrastructure organization.

As a Design Verification Engineer, you will create and maintain UVM/SystemVerilog testbenches, execute verification plans, debug issues, and collaborate with cross-functional teams to ensure IP functionality and performance.

The Design Verification Engineer will lead IP subsystem verification, develop UVM/SystemVerilog environments, and collaborate with cross-functional teams to validate hardware-software performance.

As a Design Verification Engineer, you will collaborate with architects and RTL designers to verify designs, develop test plans and infrastructure, ensure performance, and debug issues across the hardware-software stack.

Co-develop cutting-edge software for AI applications, focusing on low-level drivers and high-level frameworks, while optimizing performance for large transformer models.

Lead technical accounting and external financial reporting: implement ASC 606/IFRS 15 revenue policies, own NetSuite ARM implementation, draft technical memos, advise on inventory, warranty, equity reporting, prepare external statements and disclosures, strengthen controls, and build/manage a revenue/technical accounting team.

Lead the creation and operation of an in-house prototyping division: plan space and equipment, hire and manage machinists and technicians, run daily shop operations for same-day/next-day prototype turnaround, implement shop systems (intake, scheduling, inventory, QA), manage budget and vendor relationships, and partner with engineering teams on manufacturability and schedules.

Own electrical debug and failure analysis for PCBA and server-level assemblies at contract manufacturers in Taiwan. Perform hands-on troubleshooting, test execution, fixture support, DFM/DFT, yield improvement, documentation, and cross-functional collaboration from NPI through volume ramp.

The Electrical Engineer will lead schematic design for accelerator modules, collaborate on system requirements, and manage documentation and testing for hardware systems.

Provide end-to-end IT support for engineering and operations, manage endpoints and MDM/MAM, administer identity and access (SSO/IAM), design and secure networks (VPNs, VLANs, firewalls), implement EDR/XDR, automate workflows (Python/Bash/PowerShell), and coordinate vendors to maintain high operational reliability and compliance.