Search the 13 jobs at Etched

The Technical Program Manager will lead collaboration among internal and external teams, oversee complex engineering projects in AI datacenter hardware, manage timelines and vendor relationships, identify risks, and drive continuous process improvement to enhance operational efficiency.

As a Senior Firmware Engineer at Etched.ai, you'll design software to optimize the performance of AI hardware, collaborate with a team, solve full-stack challenges, and contribute to AI solutions that advance industries. You will review code and ensure best practices in firmware development.

As a Firmware Engineer at Etched, you will develop advanced software optimized for hardware performance, addressing challenges from low-level drivers to high-level applications. You will contribute to impactful AI solutions across fields such as natural language processing and generative media.

The Head of Legal will manage legal operations at Etched, advising on various legal matters including commercial agreements and employment law. This role involves structuring legal processes, negotiating contracts, and providing strategic counsel to the executive team as the company grows.

As an ASIC Timing Engineer at Etched, you'll drive timing analysis and closure for next-gen AI chips, collaborate with various teams to develop timing strategies, enhance timing flows, and contribute to DFT timing closure across modes.

The Design Verification Engineer will ensure the successful development of test benches for Etched's first ASIC, focusing on scalable testing methods. They will work closely with the engineering team to guarantee deliverables meet quality and performance standards while being passionate about modern AI technologies.

The Technical Program Manager at Etched will oversee the collaboration between internal teams and external vendors to ensure successful delivery of AI datacenter hardware projects. Responsibilities include managing timelines, identifying risks, enhancing operational efficiency, and using KPIs for project success. The role demands exceptional leadership and communication skills, along with a solid understanding of hardware and ASIC design.

The Reliability Engineer will ensure that components and systems meet reliability standards essential for datacenter applications. Responsibilities include developing reliability standards, collaborating on component selection, evaluating testing plans, analyzing reliability data, and working with suppliers to enhance performance and maintain quality standards.

As a DRAM Engineer at Etched, you will optimize memory controllers and PHYs, conduct DRAM simulations, validate SoC memory integration, and oversee HBM silicon testing while developing debugging methodologies and ensuring performance and reliability specifications are met.

As an RTL Design Engineer at Etched, you will develop and implement design verification strategies for AI chips, ensuring correct and efficient operation. You will work with high-speed digital logic and contribute to projects involving floating-point math computation and timing constraints, while also learning about modern AI architectures.

As a Procurement professional at Etched, you will manage vendor relationships, expedite purchasing processes, and ensure timely materials delivery for production. You'll create systems for tracking orders, negotiate contracts, and evaluate suppliers to optimize the procurement function.

The Principal Design Verification Engineer will develop ASIC testbenches, implement micro-architecture using System Verilog, and collaborate with design teams to ensure microchip functionality. Responsibilities include executing functional verification, applying timing closure methods, utilizing formal verification tools, debugging designs, and documenting the verification process.

The Physical Design Engineer will manage outsourcing for physical design, verify designs, and improve iteration speed. Responsibilities include overseeing design flows, optimizing tool usage, and facilitating block-level closure while collaborating with EDA vendors and supporting the ASIC infrastructure.