Key Responsibilities:
- Design, implement, and maintain embedded firmware for DSP cores and MCUs (RISC V and/or Arm).
- Build and optimize real-time signal-processing pipelines (fixed-point and/or floating-point), potentially including FFTs, filters, modulation/demodulation, codecs, feature extraction, or control loops.
- Develop firmware using a mix of C/C++ (and selective assembly where appropriate), with strong focus on performance, memory, and power optimization.
- Work with SoC/board peripherals: DMA, timers, SPI, I²C, UART, I²S/TDM, PWM, GPIO, and relevant bus fabrics.
- Bring up new hardware: boot flows, clocks, memory maps, interrupt vectors, peripheral init, and early validation.
- Implement and debug drivers and RTOS components (e.g., Zephyr or equivalent), including task scheduling, synchronization primitives, and ISR design.
- Develop test strategies: unit tests, hardware-in-the-loop tests, test automation, and manufacturing/production diagnostics.
- Use debugging/profiling tools: JTAG/SWD, logic analyzers, oscilloscopes, trace (ETM/ITM), and cycle-accurate profiling when available.
- Collaborate cross-functionally with hardware, FPGA/ASIC, systems, and application teams to define requirements and interfaces.
- Contribute documentation: architecture notes, interface specs, timing budgets, work packages, and bring-up guides.
- Participate in code reviews and help establish best practices for embedded quality, safety, and maintainability.
Required Skills and Qualifications:
- Strong professional experience developing embedded firmware in C/C++ for MCUs and/or DSPs.
- Hands-on experience with RISC V and/or Arm architecture (Cortex M/A), including interrupts, memory, caches, and performance characteristics.
- Solid understanding of embedded software fundamentals:
- register-level programming, memory-mapped I/O
- concurrency (ISRs, RTOS tasks), race conditions, timing determinism
- fixed-point arithmetic, numerical precision, and overflow/underflow management
- Proven ability to optimize firmware: cycle counting, memory layout, DMA usage, cache behavior, minimizing latency and jitter.
- Comfortable with toolchains and build systems:
- GCC/LLVM-based toolchains, cross-compilation
- CMake/Make, Meson, linker scripts, map files
- Strong debugging skills with hardware and firmware:
- JTAG/SWD debugging
- root-cause analysis of timing and performance issues
- Source control expertise (Git) and disciplined engineering practices (code reviews, CI).
Preferred Skills and Qualifications:
- Languages: C, C++, (optional) assembly, Python for test tooling/scripts
- Architectures: RISC V, Arm Cortex M/A, DSP cores
- RTOS/OS: Zephyr, embedded Linux (optional)
- Tools: JTAG/SWD debuggers, GDB, OpenOCD/J-Link, logic analyzer, oscilloscope, trace tools
- Practices: profiling, timing analysis, unit/integration testing, CI/CD for embedded
- Experience with common DSP libraries/techniques (e.g., CMSIS-DSP, vendor DSP libs) and SIMD/vector optimization patterns.
- Experience with Zephyr, or embedded Linux on Arm.
- Familiarity with bootloaders, secure boot, OTA update mechanisms, and field diagnostics.
- Understanding of digital communications, or audio, processing domains.
- Exposure to safety/security standards (e.g., MISRA C/C++, IEC 61508, ISO 26262)
Skills Required
- Professional experience developing embedded firmware in C/C++ for MCUs and/or DSPs
- Experience with RISC-V and/or Arm architectures (Cortex M/A), including interrupts, memory, caches, and performance characteristics
- Register-level programming and memory-mapped I/O understanding
- Concurrency knowledge (ISRs, RTOS tasks), race conditions, and timing determinism
- Fixed-point arithmetic, numerical precision, and overflow/underflow management
- Proven firmware optimization skills: cycle counting, memory layout, DMA usage, cache behavior, minimizing latency and jitter
- Familiarity with toolchains and build systems: GCC/LLVM toolchains, cross-compilation, CMake/Make, Meson, linker scripts, map files
- Strong hardware/firmware debugging skills including JTAG/SWD and root-cause analysis of timing and performance issues
- Source control expertise (Git) and disciplined engineering practices (code reviews, CI)
- Ability to bring up new hardware: boot flows, clocks, memory maps, interrupt vectors, peripheral init, and early validation
- Implement and debug drivers and RTOS components (e.g., Zephyr or equivalent)
- Develop test strategies including unit tests, hardware-in-the-loop tests, test automation, and manufacturing diagnostics
- Must be based within commutable distance of Newbury or London and follow a hybrid 2-day in-office schedule; willing to relocate prior to employment
- Must be able to access technical data without a requirement for an export license; employer unable to sponsor or obtain export licenses for this role
- Assembly (selective) experience for low-level optimizations and optional test/tooling scripting
- Familiarity with DSP libraries/techniques, SIMD/vector optimization patterns, and profiling/timing analysis practices
- Familiarity with bootloaders, secure boot, OTA update mechanisms, and field diagnostics
- Exposure to safety/security standards (e.g., MISRA C/C++, IEC 61508, ISO 26262)
Cirrus Logic Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cirrus Logic and has not been reviewed or approved by Cirrus Logic.
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Healthcare Strength — Healthcare includes multiple medical, dental and vision options, mental‑health resources, wellness programs, and access to an on‑site clinic in Austin. Feedback suggests these offerings underpin strong total‑rewards sentiment.
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Parental & Family Support — Programs span paid parental leave, fertility/adoption/surrogacy coverage, backup/dependent‑care supports, and a structured flex return. Feedback suggests family‑building depth is a notable strength of the package.
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Strong & Reliable Incentives — Compensation design features semiannual performance bonuses, profit‑sharing, and recognition awards that augment base pay. Feedback suggests these incentives help maintain competitive total compensation in key engineering roles.
Cirrus Logic Insights
What We Do
Cirrus Logic is a leading supplier of low-power, high-precision mixed-signal processing solutions for mobile and consumer applications. The company has a robust portfolio of sophisticated low-power products, including boosted amplifiers, smart codecs, camera controllers, haptic driver and sensing solutions, power conversion and control Integrated Circuits, and fast-charging Integrated Circuits. These solutions have innovative technology, software and associated algorithms incorporated. With a strong intellectual property portfolio and extensive mixed-signal expertise, Cirrus Logic is well-positioned to drive innovation and growth in the evolving markets of audio and high-performance mixed-signal processing technologies. We are hiring like crazy! Please visit our careers portal at cirrus.jobs to check out our available openings!
Why Work With Us
Engineering drives our company, and innovation isn’t just encouraged – it’s expected! This is a culture where you get to work with some of the largest, most innovative customers and products on the planet on a daily basis and where everyone is a key contributor to the company’s success. There are no Miltons here!
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