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The Role
Design, verify, and support hardware design tools, flows, and methodologies for new technology nodes. Develop EDA automation tools, platforms, databases, scripts, and testing environments, while integrating hardware designs for end-to-end tool validation. Optimize design efficiency, power, and performance across digital design, verification, layout, timing, and full-chip integration. Collaborate with EDA vendors on next-generation tools and methodologies.
Summary Generated by Built In
Job Details:Job Description: Designs, implements, verifies, and supports the enablement and adoption of hardware design tools, flows, and methodologies. Defines methodologies for hardware development related to technology node and EDA tool enabling. Creates and verifies unique hardware designs, assembles design platforms, and integrates components into hierarchical systems to provide deployment coverage for endtoend EDA tool testing on new technology nodes. Develops, tests, and analyzes engineering design automation tools, flow, and methodologies to improve efficiency and optimize power and performance. Supports development and enhancement of platforms, databases, scripts, and tools flows for design automation. Builds deep understanding of digital design, verification, structural and physical layout, fullchip integration, power and performance, clocking, and/or timing to enhance future TFM development. Collaborates with EDA vendors on defining and early testing of nextgeneration design tools.Qualifications:• Bachelor's / Master's degree in Electronics Engineering, Computer Science, or a related field.
• 3-10 years of experience in CAD software development, VLSI, or Design Enablement.
• Proficiency in SKILL, Python, and TCL/PERL programming.
• Knowledge of VLSI concepts and EDA tools (Cadence/Synopsys).
• Knowledge of Custom layout
• Knowledge of Data Structures, Algorithms, and software optimization.
• Strong problem-solving, teamwork, and communication skills.
• Familiarity with software development practices including version control, testing, and quality assurance
Preferred Qualifications:
• Exposure to C/C++ or other object oriented programming languages.
• Knowledge P-cell development and Testchip integration.
• Exposure to implementation of AI based applications in EDA tools.
Job Type:Experienced HireShift:Shift 1 (India)Primary Location: India, BangaloreAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- Bachelor’s or master’s degree in electronics engineering, computer science, or a related field
- 3–10 years of experience in CAD software development, VLSI, or design enablement
- Proficiency in SKILL, Python, and Tcl or Perl programming
- Knowledge of VLSI concepts and EDA tools such as Cadence or Synopsys
- Knowledge of custom layout
- Knowledge of data structures, algorithms, and software optimization
- Strong problem-solving, teamwork, and communication skills
- Familiarity with software development practices, including version control, testing, and quality assurance
- Exposure to C/C++ or other object-oriented programming languages
- Knowledge of P-cell development and testchip integration
- Exposure to implementing AI-based applications in EDA tools
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
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The Company
What We Do
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.

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