E-core CPU Physical Design Engineer

Posted 9 Hours Ago
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Penang, Daerah Timor Laut, Penang, MYS
In-Office
Expert/Leader
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Implement CPU core blocks from synthesis through post-layout verification and tapeout. Responsibilities include floorplanning, place and route, timing analysis and closure, low-power optimization, physical verification, scripting, and design constraint development. The engineer will collaborate with microarchitecture, RTL, and custom circuit teams, resolve technical issues, mentor others, and deliver high-frequency, multi-voltage designs under aggressive schedules.
Summary Generated by Built In
Job Details:

Job Description: 

We created the Intel Atom Processor (E-Core), a disruptive technology that enables a broad range of devices including entry PC's, smartphones, modems, 2 in 1 laptops, micro-servers, and other Internet-of-Things IoT devices.

You will be part of a team, participating in the design of a future generation high performance Intel Atom microprocessor. This role requires a engineer with strong analytic and problem solving skill, an ability to communicate well, and willing to share and discuss issues. You will work on implementation of CPU Core blocks from synthesis through post-layout verification and tapeout. You will develop the custom constraints for driving synthesis and Auto-Place and Route APR tools to implement and optimize the design to meet aggressive timing and power goals. You will work closely with micro-architecture, RTL, and custom circuit teams to converge the design to project targets.

The responsibilities will be tailored to the candidate's skills and expertise and will include several of the following, but not be limited to:

  • Logic synthesis and place and route for CORE IP blocks.

  • Performing floor-planning and routing studies and implementation

  • Block/sub-system level timing analysis.

  • Work on low power techniques and power reduction in sub-system.

  • Physical verification closure of block/sub-system.

  • Scripts writing for data analysis and recipe creation.

  • Strong analytical ability, problem solving and communication skills.

  • Ability to work independently and at various levels of abstraction.

  • Strong communication and team work skills.

  • Capable of working in a high performing team to deliver the results required from the organization.

  • Ability to work well in at team and be productive under aggressive schedules.

  • Ability to contribute as technical leader to resolve problems and provide mentorship.

Qualifications:

Minimum qualifications:

  • Must have either BS or MS in Electrical Engineering or Computer Engineering.

Minimum 10 year of experience in:

  • CPU physical design and timing verification.

  • Synthesis/APR flows on multi voltage high frequency designs including custom polygon editing.

  • Tcl scripting.

  • Noise, cross-talk, OCV analysis.

  • Floorplanning and physical design and timing closure.

  • Formal equivalence, DRC/LVS, IR and electro-migration checks.

Preferred qualifications:

  • 12+ years of experience with the above skill sets.

  • Experience with Fusion Compiler, DCT, DCE, ICC2, RedHawk, ICV, Conformal, Calibre, PrimeTime, StarRCXT.

  • Cadence Tools Experience Not a Must But Preferred.

          

Job Type:Experienced Hire

Shift:Shift 1 (Malaysia)

Primary Location: Malaysia, Penang

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor’s or master’s degree in Electrical Engineering or Computer Engineering
  • At least 10 years of experience in CPU physical design and timing verification
  • At least 10 years of experience with synthesis and auto-place-and-route flows for multi-voltage, high-frequency designs
  • Experience with custom polygon editing
  • Experience with Tcl scripting
  • Experience with noise, crosstalk, and OCV analysis
  • Experience with floorplanning, physical design, and timing closure
  • Experience with formal equivalence, DRC/LVS, IR, and electromigration checks
  • 12 or more years of experience with the required skill sets
  • Experience with Fusion Compiler, DCT, DCE, ICC2, RedHawk, ICV, Conformal, Calibre, PrimeTime, and StarRCXT
  • Experience with Cadence tools

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

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HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

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