Director, Silicon Physical Design CAD

Reposted 2 Hours Ago
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Bengaluru, Bengaluru Urban, Karnataka, IND
In-Office
Expert/Leader
Software • Quantum Computing • Metaverse • Infrastructure as a Service (IaaS)
The Role
Lead and grow a Physical Design Methodology & CAD team in India to define RTL-to-GDSII flows, automation, sign-off solutions, and AI-driven CAD transformations. Partner globally with architecture, design, verification, infrastructure, and EDA vendors to deliver scalable SoC/ASIC development, improve productivity, quality, and time-to-market.
Summary Generated by Built In
Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) powers Microsoft's rapidly expanding cloud infrastructure and is a key enabler of the company's Intelligent Cloud vision. SCHIE delivers the foundational technologies and infrastructure that support more than 200 Microsoft online services, including Azure, Microsoft 365, Teams, OneDrive, Xbox Live, Bing, and MSN. Through world-class investments in datacenter infrastructure, security, compliance, operations, globalization, and manageability, SCHIE helps deliver trusted, scalable, and efficient experiences to customers and partners worldwide.

As Microsoft's cloud business continues to accelerate, the ability to deliver new silicon innovations and infrastructure at scale, with exceptional quality, speed, and cost efficiency, has never been more critical. Within SCHIE, the Methodology, Infrastructure & Labs Engineering (MILE) organization plays a pivotal role in enabling Microsoft's silicon strategy. MILE is responsible for end-to-end silicon design methodologies, EDA/CAD ecosystems, and the underlying compute infrastructure that powers the development of Microsoft's custom silicon portfolio - the Azure Cobalt and Azure Maia processors.

We are seeking a  Silicon Engineering leader to lead our Physical Design Methodology & CAD team in India. In this leadership role, you will build & lead a high-performing team of engineers responsible for defining and driving end to end physical design methodologies, sign-off solutions, CAD strategy, and flow architecture across Microsoft's silicon programs. You will partner closely with engineering teams worldwide to deliver scalable, innovative, and robust solutions that accelerate silicon development and help shape the future of Microsoft's cloud infrastructure.


Responsibilities
  • Build and lead a world-class Physical Design Methodology & CAD team in India, fostering innovation, technical excellence, and a growth mindset.
  • Partner with engineering leaders worldwide to define and execute the long-term vision for Physical Design methodologies and CAD solutions, enabling successful delivery of Microsoft's next-generation silicon products.
  • Drive scalable RTL-to-GDSII flows, automation frameworks, and design closure solutions that enable predictable execution and first-pass silicon success.
  • Lead the AI-driven transformation of physical design methodologies, CAD flows, and engineering infrastructure by integrating advanced AI, machine learning, and automation technologies to significantly improve productivity, quality, and engineering velocity.
  • Partner with engineering leaders across architecture, design, verification, infrastructure, and program management to deliver complex SoCs on schedule while ensuring scalable and efficient development practices.
  • Influence industry direction through deep collaboration with leading EDA vendors, driving next-generation design technologies, methodology innovation, and operational excellence across Microsoft's silicon ecosystem.
  • Champion measurable improvements in quality, productivity, compute efficiency, cost optimization, and engineering effectiveness across the silicon development lifecycle.

Qualifications

Required Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
  • 12+ years of experience in Physical Design, CAD, EDA, or Silicon Engineering, with deep expertise in semiconductor design methodologies and workflows.
  • 5+ years of experience leading and developing engineering teams, including mentoring technical leads and senior engineers while fostering a high-performance engineering culture.
  • Proven experience defining, building, and scaling CAD methodologies, automation frameworks, and engineering workflows supporting complex SoC and ASIC development programs.
  • Proven success influencing and aligning stakeholders across globally distributed engineering teams to drive cross-functional initiatives and deliver complex silicon programs.
  • Demonstrated impact driving engineering excellence through investments in methodology, automation, infrastructure, and tooling that improve productivity, quality, predictability, and time-to-market.

Preferred Qualifications:

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 18+ years of relevant experience
  • Deep expertise in RTL-to-GDSII implementation and sign-off methodologies
  • Experience leading Physical Design methodology or CAD teams supporting multiple silicon programs.
  • Experience driving AI-enabled, data-driven, or automation-focused transformation initiatives within silicon engineering workflows.
  • Hands-on experience building and scaling compute infrastructure, cloud-native engineering platforms, or large-scale EDA environments.
  • Strong knowledge of industry-standard EDA tools and methodologies from vendors such as Synopsys, Cadence, and Siemens.
  • Experience partnering with EDA vendors to influence product roadmaps, drive tool adoption, and resolve complex technical challenges.
  • Strong programming and automation skills using Python, Tcl, Perl, Shell, or similar languages.
  • Experience developing silicon for datacenter, AI/ML, networking, or high-performance computing applications.
  • Demonstrated ability to attract, develop, and retain top engineering talent while fostering an inclusive, high-performance culture.

Other Requirements:
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.


This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.



Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field
  • 12+ years experience in Physical Design, CAD, EDA, or Silicon Engineering
  • 5+ years experience leading and developing engineering teams
  • Proven experience defining, building, and scaling CAD methodologies, automation frameworks, and engineering workflows for complex SoC and ASIC development
  • Proven success influencing and aligning stakeholders across globally distributed engineering teams to deliver complex silicon programs
  • Demonstrated impact driving engineering excellence via methodology, automation, infrastructure, and tooling investments
  • Ability to meet Microsoft, customer and/or government security screening requirements (Microsoft Cloud Background Check)
  • Master's degree in related field (preferred) or equivalent experience
  • Deep expertise in RTL-to-GDSII implementation and sign-off methodologies
  • Experience leading Physical Design methodology or CAD teams supporting multiple silicon programs
  • Experience driving AI-enabled or automation-focused transformation initiatives within silicon workflows
  • Hands-on experience building and scaling compute infrastructure, cloud-native engineering platforms, or large-scale EDA environments
  • Experience partnering with EDA vendors (Synopsys, Cadence, Siemens) to influence roadmaps and resolve technical challenges
  • Strong programming and automation skills using Python, Tcl, Perl, Shell, or similar languages
  • Experience developing silicon for datacenter, AI/ML, networking, or HPC applications
  • Demonstrated ability to attract, develop, and retain top engineering talent and foster inclusive culture

Microsoft Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Microsoft and has not been reviewed or approved by Microsoft.

  • Fair & Transparent Compensation Pay is presented as broadly competitive overall, with clear role/level/location variation and an emphasis on using posted ranges and band information for apples-to-apples comparisons.
  • Retirement Support Retirement benefits are described as a standout, highlighted by a strong 401(k) match structure and immediate vesting, plus additional plan features for tax-advantaged saving.
  • Parental & Family Support Family-oriented benefits are portrayed as a meaningful strength, with substantial paid parental leave and added supports like back-up care and adoption/surrogacy assistance.

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HQ: Redmond, WA
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Year Founded: 1975

What We Do

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