Digital Mixed-Signal System Architect

Reposted 11 Days Ago
Be an Early Applicant
Austin, TX, USA
Hybrid
Senior level
3D Printing
The Role
Define and validate digital mixed-signal architecture for power-management SoCs: ADC interfaces/controllers, front-end DSP, telemetry, emulation models, RTL-facing specs, firmware interfaces, and validation criteria. Collaborate cross-functionally to translate requirements into executable models, optimize tradeoffs, and document interfaces and validation evidence from model to silicon.
Summary Generated by Built In
Company Description

Renesas is a global semiconductor company delivering innovative embedded processing, analog, power, and connectivity solutions. This role supports advanced power management products for demanding compute, AI, datacenter, and infrastructure applications.

Job Description

Renesas is seeking an experienced Digital Mixed-Signal System Architect to define, model, and validate the digitally implemented mixed-signal data paths used in next-generation digital power management products for AI, datacenter, and high-performance computing applications.

This role focuses on the digital architecture that connects real-world analog measurements to control-loop decisions: ADC interfaces, ADC controllers, front-end filtering, digital signal processing, telemetry paths, emulation models, timing behavior, fixed-point implementation, and hardware/firmware interface definition.

The successful candidate will work closely with systems, digital design, firmware, verification, validation, applications, and analog design teams to translate product requirements into executable architecture, emulation-ready models, RTL-facing specifications, and silicon-validation evidence. This is not a traditional analog design role; it is a digital systems architecture role for mixed-signal power products.

WHY THIS ROLE MATTERS

  • Own the digital mixed-signal architecture between sensed power-rail behavior and control-loop action.
  • Define reusable front-end DSP, ADC-control, emulation, and observability patterns for advanced digital power products.
  • Help product teams converge faster by making mixed-signal behavior executable, measurable, and traceable from model to RTL to silicon.

KEY RESPONSIBILITIES

  • Define digital mixed-signal system architecture for digital multiphase power controllers and related power management products.
  • Architect front-end digital signal-processing paths used to filter, condition, scale, decimate, observe, and route sensed voltage and current information into control-loop, telemetry, protection, and diagnostic functions.
  • Define ADC interface behavior, ADC controller requirements, sampling relationships, data-valid timing, channel sequencing, calibration hooks, latency budgets, saturation behavior, quantization expectations, and error-handling requirements.
  • Develop executable models and emulation-oriented representations that allow system behavior to be explored before RTL and silicon are complete.
  • Translate system and control-loop requirements into RTL-facing specifications, fixed-point formats, datapath constraints, register behavior, firmware interfaces, and validation requirements.
  • Collaborate with analog design experts on ADC and sensing assumptions while focusing ownership on the digital architecture, control data path, emulation behavior, and system-level integration.
  • Work with firmware teams to define observability, debug access, telemetry behavior, configuration flows, and bring-up hooks needed for characterization and customer support.
  • Partner with verification and validation teams to define reference scenarios, pass/fail criteria, correlation expectations, coverage targets, and structured evidence for architectural decisions.
  • Analyze tradeoffs across loop performance, latency, noise sensitivity, resolution, dynamic range, power, area, configurability, implementation complexity, and customer-visible behavior.
  • Document architecture clearly for cross-functional execution teams, including assumptions, interface contracts, model behavior, limits, corner cases, and validation expectations.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
  • 8+ years of experience in digital systems architecture, mixed-signal SoC architecture, digital signal processing, power management, control-oriented digital design, semiconductor verification, or related product development.
  • Strong understanding of digital signal-processing concepts, fixed-point arithmetic, sampling theory, filtering, timing, latency, quantization, saturation, and numeric precision tradeoffs.
  • Experience defining ADC-facing digital logic, sensor data paths, telemetry data paths, digital controllers, or control-loop support logic in a semiconductor product environment.
  • Ability to translate system-level requirements into RTL-facing architecture, firmware-visible behavior, emulation models, and validation-ready specifications.
  • Strong cross-functional communication skills, including the ability to align systems, digital design, firmware, analog, verification, validation, applications, and software/tool teams.

PREFERRED QUALIFICATIONS

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, Signal Processing, Control Systems, Power Electronics, or a related discipline.
  • Experience with digital power controllers, DC/DC converters, voltage regulators, power management ICs, multiphase control, or high-current datacenter power applications.
  • Experience with RTL architecture, SystemVerilog, Python, MATLAB, C/C++, emulation, FPGA prototyping, behavioral modeling, real-number modeling, or hardware/software co-design.
  • Experience with ADC controller architecture, coherent sampling, digital filtering, decimation, telemetry, protection paths, loop compensation support, or real-time control data paths.
  • Experience creating reusable models, reference tests, or structured engineering data that improve model-to-RTL, model-to-emulation, or model-to-silicon correlation.
  • Ability to work comfortably at the boundary between algorithms, hardware architecture, firmware interface definition, and silicon validation evidence.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related discipline
  • 8+ years experience in digital systems architecture, mixed-signal SoC architecture, DSP, power management, control-oriented digital design, or related product development
  • Strong understanding of DSP concepts, fixed-point arithmetic, sampling theory, filtering, timing, latency, quantization, saturation, and numeric precision tradeoffs
  • Experience defining ADC-facing digital logic, sensor/data/telemetry data paths, digital controllers, or control-loop support logic in a semiconductor product environment
  • Ability to translate system-level requirements into RTL-facing architecture, firmware-visible behavior, emulation models, and validation-ready specifications
  • Strong cross-functional communication skills to align systems, digital design, firmware, analog, verification, validation, and applications teams
  • Master's degree or PhD in EE, Computer Engineering, Signal Processing, Control Systems, Power Electronics, or related discipline
  • Experience with digital power controllers, DC/DC converters, voltage regulators, PMICs, multiphase control, or high-current datacenter power applications
  • Experience with RTL architecture, SystemVerilog, Python, MATLAB, C/C++, emulation, FPGA prototyping, behavioral modeling, real-number modeling, or hardware/software co-design
  • Experience with ADC controller architecture, coherent sampling, digital filtering, decimation, telemetry, protection paths, loop compensation support, or real-time control datapaths
  • Experience creating reusable models, reference tests, or structured engineering data to improve model-to-RTL/emulation/silicon correlation
  • Comfortable working at the boundary between algorithms, hardware architecture, firmware interface definition, and silicon validation evidence

Renesas Electronics Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.

  • Fair & Transparent Compensation Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
  • Healthcare Strength Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
  • Leave & Time Off Breadth Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.

Renesas Electronics Insights

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The Company
HQ: Tokyo
10,040 Employees

What We Do

We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.

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