Digital Implementation Lead Application Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• We are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field Applications Team. Working at Cadence means working alongside the industry’s brightest people and innovating for the most advanced companies in the world. Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide range of customers, from helping build the world's most powerful supercomputer to innovating in the field of artificial intelligence and machine learning.

Lead Application Engineer is responsible for providing pre-sales and post-sales technical support for the Digital Implementation and Signoff tools. Will work closely with customers on bringing up flows at advanced nodes, and solving challenges in meeting power, performance and area (PPA) in vertical markets such as datacenter, ML/AI, networking and processors. The position offers growth opportunities to learn different customer segment requirements, and the latest advancements in Machine learning and 3DIC.

Position involves:

• Working with customers in one or more of the following areas:

Synthesis, Place and Route, timing and power signoff.

• Understanding and proliferating Cadence flow solutions in the areas of 3DIC implementation and ML/AI based implementation
• Driving technical evaluations/benchmarks, presenting results and delivering Cadence solutions implementations
• Supporting adoption and proliferation at existing customers (on/offsite), to help drive business for our digital implementation tools
• Working closely with R&D on tools and methodology improvements
• Create and contribute technical content for Cadence Online Support

The Position Requirements are…

• Bachelor’s degree with at least 6 years of design/EDA experience or Master’s degree with at least 4 years of experience. Master’s degree preferred.
• Strong knowledge of Digital Design Fundamentals, Semiconductor fundamentals and Static Timing Analysis is required

• Prior experience with ASIC digital implementation flows and EDA tools is required; Experience with advanced nodes (7nm and below) preferred.
• Must have experience in a scripting language such as TCL/Perl/Python
• Candidate should have strong customer-facing communication and problem solving skills
• Strong personal drive for continuous learning and expanding professional skill sets
• Strong verbal and written communication skills

At Cadence, customers are at the heart of everything we do. Talented engineers like you are what enable us to materialize this passion into results. By working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in nanometer design, unlock unique expertise in digital design implementation, and level up your communication, customer, and sales skills. No matter where you are in your career, whether your next career step is to stay on the technical track, move up in management, or explore sales/marketing career opportunities, the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead in your career advancement."

The annual salary range for California is $100,100 to $185,900. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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