Digital Design Verification Engineer

Posted 19 Days Ago
Be an Early Applicant
United States of America
107K-178K Annually
7+ Years Experience
Semiconductor
The Role
Broadcom is seeking a senior Digital Design Verification Engineer with 8+ years of experience in ASIC Design Verification. The role involves working on ASIC products for optical and electrical data center connectivity. Key qualifications include expertise in System Verilog, UVM, ARM core, APB/AHB bus protocol, and industry EDA tools like Synopsys/Cadence.
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Job Description:

Broadcom is looking for a senior level Digital Design Verification engineer. In this highly visible role you will be working on various ASIC products for the next generation of optical and electrical data center connectivity products.

Qualifications include:

  • BSc in Electrical Engineering or Computer Engineering with 8+ years of experience in ASIC Design Verification or MS in Electrical Engineering or Computer Engineering with 6+ years of experience in ASIC Design Verification

  • Deep knowledge about System Verilog, UVM and verification coverage matrix

  • Experienced in developing checker, scoreboard & writing assertions.

  • Prior experience and knowledge of ARM core, APB/AHB bus protocol, Serial peripherals (eg: I2C, SPI), SRAM integration

  • Familiarity with generating randomized vectors for analog and digital behavioral model verification.

  • Hands-on knowledge of standard industry EDA tools - Synopsys/Cadence.

  • Working knowledge of Assembly, C, and C++ languages and use in embedded systems

  • Experienced with GLS with & without parasitic annotated simulations.

Highly Desired Qualifications:

  • Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels. 

  • Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results. 

  • Excellent time and task management, and interpersonal skills. 

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $106,800 - $178,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Assembly
C
C++
System Verilog
The Company
HQ: San Jose, CA
38,985 Employees
On-site Workplace
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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