Digital Design Intern

Posted 3 Days Ago
Be an Early Applicant
Cairo, EGY
In-Office
Internship
Software
The Role
Three-month internship to learn from experienced engineers and contribute to real digital design projects. Work on Verilog RTL design/simulation, CDC/RDC techniques, ASIC/FPGA flows (RTL synthesis, place-and-route, timing sign-off), static timing analysis, and timing constraints (SDC) using industry tools and methodologies.
Summary Generated by Built In
Company Description

Mixel, a Silvaco Company, is an innovator of high-performance analog mixed signal semiconductor IPs whose solutions are powering Mobile, Display, Camera, Automotive, VR, AR and AI applications.  

Our mission is to provide our customers and partners with outstanding mixed-signal, silicon-proven IPs, creating in the process a differentiating technology that sets your products apart.  

At Mixel, you will find an inspiring environment with a strong focus on technical innovation, people well-being, no layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We value open communication, empathy, mutual trust, and respect. 

Job Description

Kick-start your career with Mixel-Egypt's 3-month Internship Program. Learn from experienced engineers, contribute to real engineering projects, and develop practical skills using industry-leading design methodologies, tools, and workflows in a collaborative, innovation-driven environment.

Qualifications

  • Bachelor’s degree of: Electronics Engineering.

  • Strong knowledge of Verilog RTL design/simulation 

  • Knowledge of clock domain crossing (CDC) and reset domain crossing (RDC) techniques 

  • Knowledge of ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off 

  • Solid understanding of static timing analysis (STA) and timing constraints (SDC) 

Desirable Qualifications and Experience: 

  • Familiarity with System Verilog, UVM, RTL/gate verification techniques 

  • Knowledge of Unix/Linux operating system 

  • Knowledge of shell scripting/programming languages 

Additional Information

  • Please add your current GPA (or latest academic grade) and military status (if applicable) to your resume.
  • Outstanding interns may be considered for future full-time opportunities based on performance and business needs.

Skills Required

  • Bachelor's degree in Electronics Engineering
  • Strong knowledge of Verilog RTL design/simulation
  • Knowledge of clock domain crossing (CDC) and reset domain crossing (RDC) techniques
  • Knowledge of ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off
  • Solid understanding of static timing analysis (STA) and timing constraints (SDC)
  • Familiarity with SystemVerilog, UVM, RTL/gate verification techniques
  • Knowledge of Unix/Linux operating system
  • Knowledge of shell scripting/programming languages
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The Company
HQ: Santa Clara
314 Employees
Year Founded: 1984

What We Do

Silvaco Inc. is a leading EDA tools and semiconductor IP provider used for process and device development for advanced semiconductors, power IC, display and memory design. For over 30 years, Silvaco has enabled its customers to develop next generation semiconductor products in the shortest time with reduced cost. We are a technology company outpacing the EDA industry by delivering innovative smart silicon solutions to meet the world’s ever-growing demand for mobile intelligent computing. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan and Asia.

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