Digital Design Engineer

Posted 21 Hours Ago
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Katowice, Śląskie
Entry level
Cloud • Hardware • Software • Semiconductor
The Role
The Digital Design Engineer at Cadence will focus on RTL design, including function definition, micro architectural specification, and verification. Responsibilities involve working on design IPs such as PCIe and USB, prototyping on FPGAs, and ensuring design quality parameters are met. Team collaboration and contributions to architecture discussions are key aspects of the role.
Summary Generated by Built In

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.The Digital Design Engineer’s primary responsibility will be the RTL design. This will include function definition, micro architectural specification, design, simulation, verification, hardware prototyping and synthesis.The role would include:

  • architecture, design implementation and support of the Cadence Design IPs (PCIe, CXL, IDE, UCIe, USB, UALink etc.,)
  • hardware prototyping including FPGA implementation, software bringup and hardware tests.
  • architecture discussions, RTL implementation as per latest specs, development of new design features – all that scale per Design IP groups’ scalable architecture and participating in Protocol Work Group discussions.
  • driving design quality parameters including LINT, CDC, DFT, Timing for leading technology libs.

Job Qualifications:

  • BS or MS in Electrical Engineering or Computer Science
  • RTL design experience desired with Verilog/System Verilog
  • Strong debugging and analytical skills
  • Digital architecture trade-offs for power, performance and area
  • Handling of multiple asynchronous clock domains and their crossings (CDC)
  • RTL lint checks and proper resolution of errors
  • Working knowledge of UNIX/Linux, shells, programming and scripting
  • Team player (fluent in English)
  • Must be legally eligible to work in Poland

Additional Skills/Preferences:

  • Exposure to modern digital verification flows: functional coverage closure, metric-driven verification, formal verification, etc.
  • Knowledge of processor-based systems and embedded programming
  • Semiconductor IP design / FPGA design experience is beneficial
  • Working knowledge of leading protocols (i.e. PCIe, CXL, AMBA, Ethernet, USB, …)
  • Ability to use UVM TB

Check what we can offer you:

  • Competitive salary package adequate to competencies 
  • Copyrights tax relief procedure implemented in salary calculations
  • Flexible working hours 
  • Work from office or hybrid 
  • Continuous professional development: trainings and seminars 
  • Possibility to cooperate with people from around the world in an expanding global organization 
  • Employee Stock Purchase Plan, bonuses and stocks 
  • Private medical care 
  • Life insurance 
  • Multisport Plus cards 
  • Social Fund benefits 
  • Recommendation bonuses & internal recognition program 
  • Additional paid days off and recharge days
  • And much more, so do not hesitate to contact us

We’re doing work that matters. Help us solve what others can’t.

Top Skills

Verilog,System Verilog
The Company
HQ: San Jose, CA
8,216 Employees
On-site Workplace
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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