Role Summary
We are seeking experienced Digital Design Leads to drive RTL design and verification for next-generation semiconductor products. This role leads the digital design effort across high-speed interface and memory subsystem IPs, partnering with architecture, verification, and physical design teams to deliver silicon-ready designs.
Key Responsibilities
- Lead RTL design and micro-architecture definition for digital IP blocks from concept through tape-out.
- Own design of Ethernet and/or PCIe controller/PHY digital logic, ensuring compliance with relevant industry specifications.
- Design and integrate memory sub-system IP, including DDR, HBM, and/or LPDDR controllers and PHYs.
- Implement and optimize Forward Error Correction (FEC) logic for high-speed serial links.
- Drive design reviews, timing closure, and low-power design practices in collaboration with cross-functional teams.
- Mentor junior design engineers and coordinate with verification, DFT, and physical design teams to meet project schedules.
Required Skills & Experience
- Proven track record as an RTL Design Lead on complex digital ASIC/SoC projects.
- Hands-on experience with Ethernet and/or PCIe protocol design (controller and/or PHY level).
- Experience with Memory Sub-systems: DDR, HBM, and/or LPDDR controller/PHY design and integration.
- Working knowledge of Forward Error Correction (FEC) schemes as applied to high-speed SerDes links.
- Strong RTL coding skills (Verilog/SystemVerilog) and familiarity with standard ASIC design flows.
- Experience with timing closure, low-power design, and design-for-test (DFT) considerations.
- Strong communication skills and experience leading or mentoring design teams.
Qualifications
- Bachelor's or Master's degree (BS/MS) in Electrical Engineering, Computer Engineering, or a related field.
- Relevant years of hands-on RTL design experience in the semiconductor industry (leadership experience preferred).
Skills Required
- B.S. or M.S. in Electrical/Electronics or Computer Engineering (or related)
- Relevant digital ASIC design experience taking designs from RTL through synthesis, timing closure, and silicon bring-up
- Strong fundamentals in digital ASIC design, micro-architecture, and RTL coding methods
- Firmware / embedded C development, including bare-metal programming on on-chip RISC CPU IP (e.g., RISC-V or Arm)
- Knowledge of AMBA and serial protocols, processors, and silicon bring-up sequences
- Design, emulation, and silicon debug skills with hardware-software integration experience
- Expertise in synthesis, timing constraints (SDC), timing closure, and equivalence checking (Formality / Conformal)
- Experience with Lint, CDC, and RDC tools and clean signoff flows
- Customer-support orientation with strong communication skills
- Familiarity with PCIe and UCIe interconnect protocols
- Experience integrating vendor CPU IP and developing firmware, drivers, and diagnostics
- High-speed wireline / SerDes-based SoC experience; UPF low-power design, DFT, scan/ATPG flows
- Scripting proficiency (Python, Tcl)
What We Do
We provide Talent Solutions for the AI Era. Our mission is to connect businesses with exceptional talent and consulting solutions that align with your company’s culture and values. We offer AI consulting services to enable businesses in leveraging cutting-edge artificial intelligence. We help discover, design and deploy AI solutions that streamline operations, boost productivity, and unlock new growth opportunities. Our team of AI experts, strategists, and technology specialists work closely with organizations to integrate AI-driven solutions that align with their unique goals and challenges. From automation and data analytics to predictive modeling and AI-based customer experiences, we provide end-to-end support for businesses embarking on their AI transformation journey.
.jpeg)
