Digital Design Engineer, Principal

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Switch Business Unit in Marvell designs and develops the next generation AI datacenter System-On-Chip switch processors on leading edge process technology. We develop the architecture, collaborate on IP development, create the physical design, and work with the world’s leading AI data center and enterprise companies to bring next generation networking to reality.

What You Can Expect

As a Principal Design Engineer, you will be at the forefront of innovation—driving micro-architecture and RTL development while spearheading HW/SW co-design efforts that power the next generation of AI datacenter technologies. Collaborating with world-class, cross-functional teams, you’ll play a critical role in shaping cutting-edge System-on-Chip (SoC) solutions that set new standards for performance and efficiency.

Your Impact Will Include:

• Lead Micro-Architecture Vision: Architect and develop advanced SoC designs, including high-value IP blocks such as Ethernet MAC, PCS, and packet processing engines, to enable next-generation networking performance.

• Deliver Complex, High-Performance Solutions: Partner with architects and verification engineers to design, validate, and optimize sophisticated, timing-critical systems—mastering every stage of the SoC front-end design flow, from timing closure to power optimization.

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 10–15 years of hands-on industry experience, or a Master’s/PhD with 5–10 years of groundbreaking work in digital IC design.

• Deep, practical knowledge of System-on-Chip architecture, including processor cores, memory subsystems, and peripheral interfaces gained through real-world design challenges.

• Extensive experience creating and optimizing Verilog RTL, with expertise in Spyglass for thorough LINT and Clock Domain Crossing (CDC) checks to ensure flawless implementation.

• Skilled in Perl and Python, using scripting to accelerate workflows, enhance efficiency, and tackle complex design tasks.

• A track record of delivering production-quality designs on aggressive schedules, demonstrating exceptional problem-solving and innovation under pressure.

• In-depth knowledge of IEEE 802.3 Ethernet standards, ensuring cutting-edge performance and industry compliance in high-speed networking solutions.

Expected Base Pay Range (USD)

146,850 - 220,000, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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