Principal Diagnostic Platform Software Engineer

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Santa Clara, CA
In-Office
Big Data • Information Technology
The Role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions grounded in open standards. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Discover more at www.asteralabs.com.

Job Description:

As member of Astera Labs Hardware Engineering team you will be responsible for building diagnostics and manufacturing software to allow design, test, and manufacture cutting edge high speed datacenter products.  You will be working on projects from conception to the final production stage at contract manufacturer.

The role requires a strong and broad software background and good understanding of hardware design and manufacturing practices.  At the same time we welcome candidates with deep experience in smaller areas with the desire to learn.  Depending on your experience, you may be focusing on design/validation or automation/manufacturing.

Key Responsibilities

  • Design, implement & test production-grade diagnostics for high-speed digital boards and ASICS to help with hardware validation.
  • Design, implement & test manufacturing tests to validate mass production of digital boards used in data center networking product
  • Bring-up newly manufactured boards and develop the first level of software.
  • Isolate and perform root-cause analysis of reported failures
  • Support new platform software and hardware features
  • Coordinate with the hardware engineering team on bring-up schedules and feature delivery
  • Participate proactively in design discussions, design review, and project management
  • Work independently as well as in team roles, mentor younger team members

Basic Qualifications/Required Experience

  • Bachelor’s in CS/CE or equivalent experience.
  • 8+ years of Experience in subset of diagnostic, hardware bring-up, test or manufacturing automation
  • Knowledge of modern software development
  • Proficiency in Python

Preferred experience

  • Experience working with datacenter-level complex electronic equipment bring-up/diagnostic/manufacturing
  • Ability to read schematic/layout
  • System debug experience
  • Embedded programming and good knowledge of OS internals (Linux/Unix)
  • Has knowledge of common interconnecting buses and interfaces such as PCIe, I2C, XAUI, 10G Ethernet drivers, FPGA, Switch chips, SSL offload, TCAM programming.
  • Experience with DDR5

The base salary range is $160,000 - $240,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

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The Company
HQ: Santa Clara, CA
148 Employees
Year Founded: 2017

What We Do

Astera Labs Inc., a fabless semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center.

Partnering with leading processor vendors, cloud service providers, seasoned investors, and world-class manufacturing companies, Astera Labs is helping customers remove performance bottlenecks in data-intensive systems that are limiting the true potential of applications such as artificial intelligence and machine learning.

The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity.

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