DFT Engineer

Reposted 4 Days Ago
Be an Early Applicant
2 Locations
In-Office
Mid level
Artificial Intelligence • Semiconductor
The Role
The DFT Engineer will advance AI designs, implement DFT architecture, develop flows, and collaborate across teams to enhance test coverage.
Summary Generated by Built In
About Graphcore

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. 

It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone.  

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. 

The Person 

Graphcore’s experienced, skilled, and motivated engineering team is heavily involved in shaping the future of AI. A successful candidate will exhibit exceptional knowledge in Design for Testability (DFT) and will have a strong technical background and experience in DFT methodologies, complemented by a robust, self-motivated work ethic. The ideal candidate should also have a focus on quality and demonstrate a good understanding of the importance of production test on the success of a product. Some hands-on experience in one or more of the following areas is essential: RTL design, simulations and debugging, synthesis, STA.  

The Role: 

We are expanding and looking for an experienced DFT engineers to join the Silicon team. As a part of our team, you will have the opportunity to work on next-generation AI designs targeted for data centers applications. 

Responsibilities: 

  • Keep up with the latest industry trends in DFT domain and help adopt the latest DFT techniques and methodologies 
  • Work closely with design, verification, physical design and product engineering teams to integrate DFT requirements into the overall design process 
  • Define and implement DFT architecture and features for next-generation AI designs and support their verification effort 
  • Develop efficient DFT flows and methodology compatible with silicon design flows 
  • Work with 3rd party IPs to integrate the provided design into the DFT infrastructure 
  • Generate structural test vectors, analyze and improve test coverage 
  • Work with the product and test engineering teams to ensure successful silicon bring-up and help identify any silicon failures to enhance yield learning and improvement 

Requirements: 

  • Very good understanding of DFT components like JTAG (IEEE 1149.x), IJTAG (IEEE P1687), Core Test (IEEE P1500), SSN (Streaming Scan Network), Test Compression, OCC etc. 
  • Experience on developing DFT specifications and driving the implementation of the DFT features 
  • Experience in MBIST and BISR implementation and verification is desired 
  • Solid understanding of design verification methodologies for validating the DFT features using simulation in pre-silicon designs 
  • Exposure to STA constraints development and analysis for DFT modes and SDF simulations would be a plus 
  • Experience in Scan based testing and industry standard ATPG tools 
  • Knowledge of ATPG pattern verification and gate-level simulation flows using Synopsys VCS and Verdi or other EDA tools 
  • Very good knowledge of Digital Integrated Circuits and Systems 
  • Hands-on experience with Verilog RTL coding and familiarity with System Verilog   
  • Strong scripting and debugging skills using programming languages like Python, TCL, Perl, Shell etc. 
  • Exposure to silicon bring-up, post-silicon testing and tester pattern debugging 
  • Strong problem-solving skills across various levels of design hierarchies 
  • Great team working and communication skills 

Academic Credentials 

  • Bachelors or Masters or PhD in Computer engineering/Electrical engineering/Electronics Engineering

Benefits: 

In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments  

We welcome people of different backgrounds and experiences and are committed to building an inclusive work environment that makes Graphcore a great home for everyone. We are an equal opportunity employer and want to build a work environment where everyone is happy, productive and respectful so they can do their best work. If you have a disability or additional need that requires accommodation, just let us know. 

Applicants for this position must hold the right to work in the UK. Unfortunately at this time, we are unable to provide visa sponsorship or support for visa applications.

Top Skills

Bisr
Core Test
Dft
Ijtag
Jtag
Mbist
Occ
Perl
Python
Shell
Ssn
Sta
Synopsys Vcs
System Verilog
Tcl
Test Compression
Verdi
Verilog
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The Company
HQ: Palo Alto, CA
389 Employees
Year Founded: 2016

What We Do

Graphcore has created a new processor, the Intelligence Processing Unit (IPU), specifically designed for artificial intelligence. The IPU’s unique architecture means developers can run current machine learning models orders of magnitude faster. More importantly, it lets AI researchers undertake entirely new types of work, not possible using current technologies, to drive the next great breakthroughs in general machine intelligence.

Our next generation 3D Wafer-on-Wafer Bow IPU systems are helping AI innovators worldwide to build better, more innovative AI solutions, whether their focus is on language and vision, exploring graph neural networks and LSTMs or creating something entirely new.

We believe our IPU technology will become the worldwide standard for artificial intelligence compute. The performance of Graphcore’s IPU is going to be transformative across all industries and sectors whether you are a medical researcher, roboticist or building autonomous cars.

Our team is at the forefront of the artificial intelligence revolution, enabling innovators from all industries and sectors to expand human potential with technology. What we do, really makes a difference.

We're always interested in hearing from exceptional people to join our team.

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