Jobs at Graphcore

The Senior Staff Firmware Engineer will design and develop complex firmware systems for hardware platforms, lead architectural decisions, and mentor team members.

The candidate will lead troubleshooting and engineering support for AI hardware platforms, collaborating with teams on validation and performance.

Lead strategic sourcing for memory and storage technologies (DRAM, SSD, HDD) supporting AI infrastructure. Develop supplier strategies, manage relationships, negotiate commercial agreements, ensure capacity and supply continuity, perform cost modelling and market intelligence, drive supplier performance and risk mitigation, and support new product introductions with cross-functional teams.

Lead end-to-end strategic sourcing for AI infrastructure commodities: supplier selection, negotiation, cost modeling, performance management, risk mitigation, and cross-functional collaboration to ensure resilient supply for Graphcore's compute platforms.

The Staff Hardware Engineer leads troubleshooting and validation of AI compute platforms, collaborating with various teams to ensure hardware reliability and performance.

Lead cross-functional programs for AI networking infrastructure, ensuring alignment between network architecture, hardware development, and operational readiness. Manage supplier relationships and oversee the technical roadmap for scalable AI infrastructure delivery.

The role involves coordinating engineering programs, managing procurement and materials, tracking project schedules, and collaborating with vendors to ensure timely production and quality management.

The Senior System Validation Engineer will design and implement validation tests for Arm-based SoCs, automate tests using Python, and analyze results across processing units and memory systems.

Lead execution of validation plans and automation for silicon and platform technologies. Build and maintain test frameworks, run functional/performance/reliability tests, analyse results, perform root-cause investigations, integrate new validation capabilities, and improve test coverage, execution efficiency, and product quality across silicon, FPGA, and system-level environments.

Lead bring-up, validation, characterization and debug of DDR/HBM memory subsystems for AI compute silicon. Develop and run functional, stress and performance tests, perform PHY and analog analysis, collect and analyze validation data, debug hardware/firmware/system issues, and build Python automation and reporting tools. Collaborate across design, firmware, platform and systems teams to ensure memory reliability and production readiness.

Responsible for bring-up, validation, characterization and debug of DDR and HBM memory subsystems for AI compute platforms. Develop and run functional, stress, performance and corner-case tests, perform PHY and analog analysis, use lab instrumentation for signal/timing measurements, analyze results, debug firmware/hardware/system issues, and build Python-based automation and reporting to improve validation efficiency. Collaborate across architecture, RTL, firmware and platform teams and support silicon characterization and production readiness.

The Director of Silicon Logical Design leads the Logical Design team, overseeing micro-architecture and RTL design. Responsibilities include setting strategic direction, enhancing methodologies, and ensuring high-quality silicon delivery.

The PyTorch Engineer will design, implement, and optimize features for machine learning frameworks, ensuring high performance and code quality while supporting users and collaborating with teams.

As a Senior Scrum Master, you will facilitate Agile processes, manage impediments, mentor teams, and advocate for continuous improvement in AI technology projects.

Develop and deploy cloud services, optimize AI systems, and work on infrastructure automation while collaborating with various teams.

The AI Platform Architect will design a cohesive architecture for AI environments, oversee workload orchestration, eliminate system bottlenecks, and collaborate on hardware-software integration. Responsibilities include developing a 3-to-5-year technical vision for the AI platform and ensuring data flow between AI compute nodes and network fabrics is optimized.

Lead the design and development of applications in Go for integrating new AI accelerator in Kubernetes, mentoring junior engineers and collaborating with cross-functional teams.

The Senior Thermal Engineer will design and develop liquid cooling solutions for AI data center hardware, ensuring compliance with thermal specifications. Responsibilities include leading design processes, performing thermal simulations, collaborating with vendors, and validating thermal solutions for performance and efficiency.

The Principal Network Engineer oversees network fabric maintenance for AI datacenters, collaborates on high-speed network design, and troubleshoots complex routing protocols.

Develop and manage software interfaces for rack management solutions, ensuring robust performance in AI systems and infrastructure. Collaborate across teams to enhance operational efficiency, employing skills in cloud-native environments and troubleshooting.