DFT Engineer

Posted 4 Days Ago
Be an Early Applicant
Tianjin, Tianjin Municipality, Tianjin, CHN
In-Office
Junior
Automotive • Internet of Things • Mobile • Semiconductor • Industrial
The Role
Implement and verify DFT solutions for complex SoCs, including Scan, MBIST, Boundary Scan, scan insertion, DRC checks, fault coverage analysis, and ATPG pattern development. Create DFT automation scripts, collaborate with design and verification teams, and support silicon bring-up, diagnosis, and yield improvement during production ramp-up.
Summary Generated by Built In
Responsibilities:
  • Implement and verify Scan, MBIST, and Boundary Scan solutions for complex SoC designs.
  • Perform scan insertion, DFT DRC checking, and scan chain validation to ensure testability and design quality.
  • Analyze fault coverage and develop ATPG patterns for production silicon testing.
  • Develop and maintain DFT automation flows and scripts using Tcl, Perl, Python, or Shell
  • Collaborate with SoC Design, Verification, Physical Design, and Test Engineering teams to resolve DFT and test-related issues throughout the product development cycle.
  • Support silicon bring-up, diagnosis, and yield improvement activities during product ramp-up and production.
Requirements:
  • Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Science, or a related field.
  • 1-3 years of experience in VLSI design, DFT, or a related semiconductor engineering field.
  • Strong communication and interpersonal skills, with the ability to work effectively in a global team environment.
  • Good command of English; CET-6 or equivalent English proficiency is preferred.
  • Good knowledge of Design-for-Test (DFT) methodologies, including Scan, MBIST, and Boundary Scan.
  • Proficiency in Verilog, VHDL, and scripting languages (such as Tcl, Perl, Python, or Shell).
  • Hands-on experience with SoC DFT design and implementation for large-scale chips is a plus.
  • Familiarity with ASIC/SoC development flow, verification, and implementation processes is preferred.


More information about NXP in Greater China...

#LI-6650

Skills Required

  • Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Science, or a related field
  • 1-3 years of experience in VLSI design, DFT, or a related semiconductor engineering field
  • Strong communication and interpersonal skills for effective collaboration in a global team
  • Good command of English
  • Knowledge of Design-for-Test methodologies, including Scan, MBIST, and Boundary Scan
  • Proficiency in Verilog, VHDL, and scripting languages such as Tcl, Perl, Python, or Shell
  • Hands-on experience with SoC DFT design and implementation for large-scale chips
  • Familiarity with ASIC/SoC development, verification, and implementation processes
  • CET-6 or equivalent English proficiency
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The Company
HQ: Eindhoven
21,993 Employees
Year Founded: 2006

What We Do

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 34,500 employees in more than 30 countries and posted revenue of $13.21 billion in 2022. Find out more at www.nxp.com. Privacy Policy: https://www.nxp.com/company/about-nxp/privacy-policy-for-social-media-pages:PRIVACY-POLICY-SOCIAL-MEDIA

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