Job Description
Position Responsibilities:
- Logic Design to support DFT features
- Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC
- Verification of DFT Logic and analysis of fault coverage
- Timing analysis for DFT Modes
Minimum Requirements:
- MSEE in Electrical / Computer Engineering
- Knowledge of DFT fundamentals
- Knowledge of Logic design & Static timing analysis
- Knowledge of Verilog and any scripting language
Skills Required
- MSEE in Electrical / Computer Engineering
- Knowledge of DFT fundamentals
- Knowledge of Logic design & Static timing analysis
- Knowledge of Verilog and any scripting language
What We Do
Ambarella (Nasdaq: AMBA) is a leading developer of visual AI products. Our technologies enable a wide variety of human and computer vision applications, including video security, advanced driver assistance systems (ADAS), electronic mirror, drive recorder, driver/cabin monitoring, autonomous driving, and robotic applications. Ambarella’s low-power system on chips (SoCs) offer high-resolution video compression, advanced image processing, and powerful deep neural network processing to enable intelligent cameras to extract valuable data from high-resolution video streams. For more information, please visit www.ambarella.com
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