Design Engineering Intern

The Silicon Labs Summer Internship Program 

At Silicon Labs, our internship program offers students the opportunity to do meaningful, hands-on work that directly impacts the future of connected devices. As an intern, you’ll contribute to real projects, collaborate with world-class engineers, and gain exposure to the full product lifecycle, from research and design to testing and integration. Our program also includes professional development workshops, networking events, and mentorship to help you grow both technically and professionally.  Our goal is to help you build on your skills, gain hands-on experience, and explore the potential of a future career with Silicon Labs.  Learn more about our Summer Internship Program. 

Meet the Team 

You’ll join the Digital Design Verification team. We ensure the reliability and robustness of the digital logic that powers our cutting-edge wireless connectivity solutions. We work closely with design engineers to validate functionality, uncover edge cases, and guarantee high-quality silicon that meets the demands of real-world applications. This is a highly collaborative environment where problem-solving and innovation come together to build products that shape the IoT ecosystem 

Responsibilities 

• Develop and execute verification plans for digital designs using industry-standard methodologies. 

• Create testbenches, test cases, and assertions to validate functionality and corner cases. 

• Collaborate with design engineers and chip architects to understand specifications and identify potential design risks. 

• Apply object-oriented programming techniques in verification environments to improve efficiency and reusability. 

• Debug simulation results, analyze coverage, and work toward achieving verification closure. 

• Contribute to the continuous improvement of verification methodologies and best practices. 

Skills You Need 

Minimum Qualifications: 

• Currently pursuing a Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Computer Engineering, or a related field. 

• Strong understanding of digital design and digital logic fundamentals. 

• Proficiency with SystemVerilog for verification and/or design. 

• Hands-on experience with object-oriented programming concepts applied in a technical or academic setting. 

• Coursework or project experience in digital or logic design (RTL, Verilog, or related work). 

• Strong problem-solving skills and ability to work both independently and in a team environment. 

The following qualifications will be considered a plus: 

• Experience with UVM (Universal Verification Methodology). 

• Familiarity with constrained-random test generation and coverage-driven verification. 

• Exposure to simulation tools and industry verification flows. 

• Contributions to academic or personal projects involving digital verification or hardware modeling. 

• Knowledge of low-power design verification or SoC verification concepts. 

Perks and Program Offerings 

You can look forward to the following:     

• Hybrid work schedule  

• Free downtown parking  

• Full access to onsite gym  

• Free snacks and beverages  

• Weekly Lunch and Learn sessions 

• Weekly 1 x 1’s with your manager and mentor 

• Weekly "Meet a Former Intern” coffee chats  

• Monthly wellness offerings  

• Monthly company updates with our CEO  

• Inclusion in social events with various teams and Employee Resource Groups (ERGs) 

• Participation in select L&D offerings  

• Virtual events with global intern class  

• End of summer presentation of your project during Intern Symposium 

The annualized base pay range for this role is expected to be between $79,040 ($38/HR) to $95,680 ($46/HR) USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees.  Other components may include a sign on bonus. 

#LI-MA1 

#Hybrid