The Role and Impact
As an Infrastructure and DevOps Engineer at Intel Foundry, you will play a vital role in enabling and optimizing design environments that support advanced semiconductor development. You will focus on installing, maintaining, and providing technical support for design automation scripts, front-end and back-end tools, workflows, and licenses. Your contributions will help ensure seamless integration of new tools and methods, driving design processes efficiently and effectively.
Business Group
Intel Foundry is a cornerstone of Intel's mission to revolutionize semiconductor manufacturing and design. The Infrastructure and Solutions team within Intel Foundry focuses on delivering robust, scalable, and innovative solutions that empower Intel's engineering teams to achieve breakthrough results. By joining this group, you'll be contributing to Intel Foundry's goal of advancing technological innovation and supporting the design of next-generation products.
Key Responsibilities
- Resolve tool/methodology issues encountered during the design path to TapeOut.
- Provide training and documentation support for design ramp-up activities.
- Collaborate with EDA providers to ensure required tool features meet project quality expectations.
- Partner closely with PDK/library experts, flow development teams, and product design teams to drive workflow improvements.
- Work with engineering compute teams to provision adequate compute capacity and troubleshoot associated issues.
- Develop automation for the installation and optimization of design environments, including PDKs, EDA tools, and licenses.
- Support the seamless integration of new tools and methods into existing workflows, ensuring scalability and adoption across design teams.
Minimum Qualifications
- US Citizenship required.
- Ability to obtain a US Government Security Clearance TS/SCI.
- Bachelor's degree in relevant field with 6+ years of hands-on experience in infrastructure and DevOps roles OR a Master's degree with 4+ years of experience OR a PhD with 2+ years of experience.
- Experience with front-end and back-end EDA tools, flows, and methodologies, including debugging and problem-solving.
Knowledge of physical design optimization and tools flows/methodologies (TFM). - Experience with scripting languages such as Tcl, Perl, Python, and familiarity with Verilog/VHDL.
- Expertise in Linux-based environments, including bash and tcsh.
Preferred Qualifications
- Hands-on experience with industry-standard front-end and back-end EDA tool installations.
- Experience with installing foundry PDKs and flows, including tools like Cheetah.
- Experience with debugging and design automation.
Join our team and contribute to shaping the future of semiconductor innovation while growing your expertise in a dynamic, collaborative environment.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, FolsomAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $137,610.00-265,870.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- US citizenship
- Ability to obtain a US Government Security Clearance at the TS/SCI level
- Bachelor's degree in a relevant field with 6 or more years of hands-on infrastructure and DevOps experience
- Alternatively, a Master's degree with 4 or more years of relevant experience
- Alternatively, a PhD with 2 or more years of relevant experience
- Experience with front-end and back-end EDA tools, flows, and methodologies
- Knowledge of physical design optimization and TFM tool flows and methodologies
- Experience with Tcl, Perl, and Python scripting
- Familiarity with Verilog and VHDL
- Expertise in Linux-based environments, including Bash and Tcsh
- Hands-on experience installing industry-standard front-end and back-end EDA tools
- Experience installing foundry PDKs and flows, including Cheetah
- Experience with debugging and design automation
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
Intel Insights
What We Do
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.
