Job Description
The candidate will be responsible for driving customer engagement on parasitic extraction solutions, including transistor-level and cell-level extraction, RC/RLC analysis, and signoff validation using Quantus.
The candidate will work closely with customers to analyze and resolve complex technical issues, ensuring high-quality extraction results and successful tape-outs.
The candidate will serve as a key interface between customers, AE teams, and R&D, facilitating efficient communication, feedback loop, and issue resolution.
The candidate will support methodology setup and deployment, including flow enablement, best practices, and usage guidance for parasitic extraction and related design flows.
The candidate will participate in customer training, technical reviews, and solution delivery, ensuring effective adoption of Quantus solutions.
The candidate will have the opportunity to work on advanced-node designs, large-scale parasitic networks, and next-generation EDA technologies.
Primary Responsibilities:
o Provide technical support and engagement for parasitic extraction flows, including flow enablement and methodology deployment
o Work with customers to analyze design challenges and provide professional guidance and solutions
o Act as the primary interface between customers, AE teams, and R&D to drive issue resolution and feature improvements
o Support customer training activities and provide best practices for tool usage and design flows
o Assist in debugging complex design or flow issues and ensure timely resolution
o Participate in technical reviews and support customer tape-out readiness
o Contribute to internal knowledge base, documentation, and methodology development
Requirement:
B.S/M.S in Microelectronics, Electronics, Electrical, Communication Engineering (or similar degree) with 3+ years of relevant industry experience.
Strong understanding of ASIC design flow, including parasitic extraction, post-layout simulation, and signoff methodologies.
Familiar with EDA tools such as Quantus/QRC, Virtuoso, or Innovus.
Strong debugging and problem-solving skills with the ability to analyze complex design behaviors.
Basic programming and scripting skills (e.g., Python, shell, or Tcl) with the ability to develop simple automation or data analysis scripts.
Experience in customer engagement, technical support, or cross-functional collaboration with AE/R&D teams is highly preferred.
Able to manage multiple tasks and priorities and work effectively in a fast-paced environment.
Strong communication and collaboration skills, with good English communication ability.
Skills Required
- B.S./M.S. in Microelectronics, Electronics, Electrical, Communication Engineering or similar with 3+ years relevant industry experience.
- Strong understanding of ASIC design flow, parasitic extraction, post-layout simulation, and signoff methodologies.
- Familiarity with EDA tools such as Quantus/QRC, Virtuoso, or Innovus.
- Strong debugging and problem-solving skills to analyze complex design behaviors.
- Basic programming and scripting skills (Python, shell, Tcl) for automation and data analysis.
- Experience in customer engagement, technical support, or cross-functional collaboration with AE/R&D teams.
- Ability to manage multiple tasks and priorities and work effectively in a fast-paced environment.
- Strong communication and collaboration skills, with good English communication ability.
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
