CPU Physical Design Engineer

Posted 4 Hours Ago
Be an Early Applicant
Austin, TX, USA
In-Office
106K-200K Annually
Mid level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Implements and optimizes CPU physical designs from RTL through manufacturing-ready databases. Responsibilities include floorplanning, synthesis, place and route, clock tree synthesis, static timing analysis, power optimization, verification, signoff, layout checks, and design automation. The engineer collaborates with architecture, logic, circuit, validation, automation, and EDA teams to improve performance, power, area, timing, manufacturability, and physical design methodologies.
Summary Generated by Built In
Job Details:

Job Description: 

The Role

Do you enjoy solving complex engineering challenges and pushing the boundaries of CPU performance?


Join Intel’s CPU Design team and help develop the next generation of high-performance processors. As a CPU Physical Design Engineer, you will contribute to the physical implementation and optimization of complex CPU designs, helping achieve ambitious goals for performance, power, area, timing, and manufacturability.


You will work alongside engineers across architecture, logic design, circuit design, design automation, and validation to turn innovative CPU concepts into manufacturable silicon. Your work will contribute directly to technologies enabling the next generation of client, data center, and AI computing.


This is an opportunity to deepen your physical design expertise, work with advanced semiconductor technologies, and solve challenging engineering problems alongside experienced technical teams.


About the Team

Intel’s CPU Design team within the Silicon and Platform Engineering Group (SPE) develops advanced processor technologies that power the future of computing.


Our engineers bring together expertise across architecture, logic, circuit, physical design, and design automation to build high-performance CPUs using advanced process technologies and innovative design methodologies.


We value technical curiosity, collaboration, continuous learning, and people who are motivated to find better ways to solve complex problems.


What You’ll Do

Key responsibilities will include but not limited to:

  • Implement CPU physical designs from RTL through a design database ready for manufacturing.
  • Work across the physical design flow, including floorplanning, synthesis, place and route, clock tree synthesis, static timing analysis, power and clock distribution, and design optimization.
  • Perform verification and signoff activities such as formal equivalence, reliability verification, layout verification, and structural design checks.
  • Analyze design results and identify opportunities to improve power, performance, area, timing, and overall design quality.
  • Collaborate with architecture, logic, circuit, and design automation engineers to solve complex CPU design challenges.
  • Develop and improve physical design methodologies, flows, and automation.
  • Work with internal engineering teams and EDA partners to evaluate and improve design tools and capabilities.
  • Apply lessons learned from current designs to help improve future CPU products and methodologies.

Behavioral traits that we are looking for:

  • Strong analytical and technical problem-solving skills.
  • Ownership and accountability for delivering high-quality results.
  • A proactive mindset with the ability to identify challenges, explore solutions, and drive work forward.
  • Strong collaboration skills and the ability to work across global, multidisciplinary engineering teams.
  • Effective written and verbal communication skills.
  • Adaptability and comfort working in a dynamic technical environment.
  • Curiosity and a desire to continuously learn, grow, and explore new technologies.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life. 

  • See  Intel Benefits for more details. 

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.  Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.


Note:

For information on Intel’s immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information


Minimum Qualifications and Experience:


Bachelor's degree in Electrical/ Computer Engineering, or a related field with 3+ years of relevant experience. Or a Master's degree in the same field with 1+ years of educational or work experience.


Your experience describe above must be in the following:

  • Physical design implementation using industry-standard EDA tools such as Synopsys Fusion Compiler, Cadence Genus/Innovus, or equivalent.
  • Backend physical design workflows, including experience in areas such as floorplanning, place and route, clock tree synthesis, static timing analysis, and layout verification.
  • Scripting with TCL, Perl, Python, or similar languages for design automation, analysis, or design exploration.
  • Experience with RTL-to-GDS physical design flows.

Preferred Qualifications and Experience:


A PhD in in the same field with 6+ months of educational or work experience.


Experience in one or more of the following areas is a plus:

  • CPU, SoC, or other complex high-performance physical design.
  • Tape-out experience using advanced semiconductor process technologies.
  • Low-power design techniques, multiple power domains, UPF, or power analysis methods.
  • Power, performance, area, and timing optimization.
  • RTL-to-GDS design-flow automation.
  • AI/ML-based approaches to place-and-route or physical design optimization.
  • Working across multiple EDA tools or vendor platforms.
  • Collaborating with EDA vendors to evaluate or improve design tools and methodologies.
  • Thermal or power-reduction techniques.

Why Join Intel

At Intel, you will have the opportunity to help develop technologies that shape the future of computing.


As part of the CPU Design team, you will tackle complex engineering challenges, work with advanced semiconductor technologies, and collaborate with talented engineers across multiple disciplines. You will have opportunities to expand your technical expertise while contributing to next-generation CPU products supporting client, data center, and AI computing.


We are looking for people who are curious, collaborative, and excited about solving difficult technical problems.


If you are passionate about semiconductor design and want to help build the next generation of computing technology, we encourage you to apply.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, Texas, Austin

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3 or more years of relevant experience
  • Master's degree in Electrical Engineering, Computer Engineering, or a related field with 1 or more years of educational or work experience
  • Experience implementing physical designs using industry-standard EDA tools such as Synopsys Fusion Compiler, Cadence Genus, Cadence Innovus, or equivalent
  • Experience with backend physical design workflows, including floorplanning, place and route, clock tree synthesis, static timing analysis, and layout verification
  • Scripting experience with TCL, Perl, Python, or similar languages for design automation, analysis, or design exploration
  • Experience with RTL-to-GDS physical design flows
  • PhD in Electrical Engineering, Computer Engineering, or a related field with at least 6 months of educational or work experience
  • Experience with CPU, SoC, or other complex high-performance physical design
  • Tape-out experience using advanced semiconductor process technologies
  • Experience with low-power design techniques, multiple power domains, UPF, or power analysis methods
  • Experience with power, performance, area, and timing optimization
  • Experience automating RTL-to-GDS design flows
  • Experience applying AI or machine learning to place-and-route or physical design optimization
  • Experience working across multiple EDA tools or vendor platforms
  • Experience collaborating with EDA vendors to evaluate or improve design tools and methodologies
  • Experience with thermal or power-reduction techniques

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

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The Company
HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.

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