CPU Physical Design Engineer

Posted Yesterday
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Bangalore, Bengaluru Urban, Karnataka, IND
In-Office
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Implement high-performance, low-power CPU designs from RTL to GDSII through synthesis, placement, routing, clock tree synthesis, timing analysis, power optimization, and reliability verification. Collaborate with architecture, logic, circuit, automation, and EDA vendor teams to improve CPU designs, manufacturing readiness, physical design methodologies, and workflow automation.
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Job Details:

Job Description: The Role and Impact As a CPU Physical Design Engineer, you will play a pivotal role in implementing high-performance, low-power CPU designs from RTL to GDSII. You will focus on detailed processes such as synthesis, placement, routing, timing analysis, and power optimization, enabling designs that meet stringent performance and efficiency targets. Your work will directly influence the success of Intel's next-generation CPUs and their manufacturing readiness, contributing to innovative advancements in computing technology. Business Group You will join the Advanced Computing and Engineering (ACE) group, a dynamic team dedicated to designing Intel's latest high-performance CPUs using cutting-edge technologies. This group focuses on delivering innovative solutions that propel Intel's leadership in the semiconductor industry. Collaborating across multiple domains, the team drives groundbreaking designs that support Intel's mission of creating world-changing technologies to enrich the lives of every person on Earth. Key Responsibilities - Perform physical design implementation from RTL to GDSII, including synthesis, placement, routing, clock tree synthesis, and optimization. - Conduct static timing analysis, power distribution analysis, and reliability verification to ensure design convergence and high manufacturability. - Collaborate with logic, circuit, architecture, and automation teams to improve CPU microarchitectures and design methodologies. - Work closely with industry-leading EDA vendors to enhance tool capabilities for high-speed, low-power CPU development. - Optimize designs for power, frequency, and area, ensuring product-level parameter excellence. - Participate in developing and improving physical design methodologies and flow automation for future projects.

Qualifications:Minimum Qualifications - Bachelor's degree in Electrical, Electronics, or Computer Engineering with 6+ years of physical design experience, or a Master's degree with 4+ years of relevant experience, or a PhD with 2+ years of experience. - Technical expertise in synthesis, placement, clock tree synthesis (CTS), and routing tools, particularly using Synopsys and Cadence platforms. - Proficiency in timing signoff, formal verification, and low-power design techniques. - Solid understanding of submicron process node technologies and layout verification methods such as LVS/DRC. - Skilled in power estimation, power optimization, and power delivery methodologies. Preferred Qualifications - Familiarity with scripting languages like Tcl, Perl, and Python for automating physical design workflows. - Experience with Verilog or VHDL for hardware description and design execution. - Strong communication skills, both verbal and written, for collaborative problem-solving. - Demonstrated ability to work effectively in dynamic environments across geographies. - Knowledge of innovative feature feasibility studies and SD flow methodologies. Be part of a world-class team driving innovation in CPU design. Apply today to contribute to Intel's mission of shaping the future of technology.

          

Job Type:Experienced Hire

Shift:Shift 1 (India)

Primary Location: India, Bangalore

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor's degree in Electrical, Electronics, or Computer Engineering with 6+ years of physical design experience
  • Master's degree in Electrical, Electronics, or Computer Engineering with 4+ years of relevant experience
  • PhD in Electrical, Electronics, or Computer Engineering with 2+ years of relevant experience
  • Technical expertise in synthesis, placement, clock tree synthesis, and routing tools, particularly Synopsys and Cadence platforms
  • Proficiency in timing signoff, formal verification, and low-power design techniques
  • Understanding of submicron process node technologies and LVS/DRC layout verification
  • Skills in power estimation, power optimization, and power delivery methodologies
  • Familiarity with Tcl, Perl, and Python scripting languages
  • Experience with Verilog or VHDL
  • Strong verbal and written communication skills
  • Ability to work effectively in dynamic, geographically distributed environments
  • Knowledge of feature feasibility studies and SD flow methodologies

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

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The Company
HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.

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