CPU Architect, Vector

We are seeking an experienced CPU Architect with a strong focus on Vector architecture to join our team. The successful candidate will lead the architecture and performance validation of RISC-V CPUs, ensuring that designs meet and exceed specifications. This is a high-impact role that involves collaboration with cross-functional teams, including design, verification, and physical design, to guarantee optimal device performance from pre-silicon to post-silicon phases.The ideal candidate is a seasoned professional with deep expertise in CPU architecture, advanced validation methodologies, and performance optimization strategies. They should be passionate about pushing the boundaries of CPU performance and well-versed in industry trends.

This role is Remote or in one of our offices, based out of The United States.

Responsibilities:

• Write vector microbenchmarks to create power viruses and test vector performance on current and future CPU microarchitectures 
• Work with SW & compiler team on analyzing and optimizing vector compilation and performance on multiple important workloads
• Participate in the RISCV International workgroups related to vector specifications as a representative of Tenstorrent to give feedback on new vector instructions
• Explore hardware and software co-optimization opportunities to drive system performance improvements.
• Propose PPA optimizations for the current vector microarchitecture, including changes to load/store microarchitecture and instruction cracking
• Define and enhance methodologies for pre-silicon and post-silicon validation of high-complexity System-on-Chip (SoC) designs.
• Innovate techniques for performance validation, ensuring that products meet and exceed specification requirements.
• Work closely with architects, hardware engineers, and microcode (ucode) engineers to understand and implement new CPU features.
• Analyze SoC design features to assess their performance impact and identify optimization opportunities.
• Investigate key workloads, pinpoint bottlenecks, and prototype solutions to improve performance.
• Design and maintain the silicon validation architecture roadmap for next-generation product introductions.
• Define validation requirements in collaboration with cross-functional teams, ensuring compliance throughout the design lifecycle.
• Optimize silicon validation architectures for performance, power consumption, and area efficiency.
• Develop and maintain complex models and simulations of silicon devices using advanced tools.

Experience & Qualifications:

• 7+ years of experience in silicon performance validation or CPU architecture.
• Master’s degree in Computer Engineering, Computer Science, or a related field (or equivalent experience).
• Strong expertise in CPU performance analysis, silicon validation, and computer architecture, with at least 5 years focused on performance validation.
• Proficiency in pre-silicon performance models, RTL, emulation, and FPGA platforms (e.g., Zebu, HAPS).
• Hands-on experience with tools like Linux perf, ARM DS5, or custom validation tools.
• Skilled in writing and analyzing microbenchmarks using assembly and/or C/C++.
• Proficiency in C++, Python, and SystemVerilog for scripting and validation purposes.
• Familiarity with Continuous Integration (CI) systems and task automation using Python.
• Demonstrated knowledge of Vector architecture is highly desirable.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.