Broadcom

ASIC Physical Design Engineer

Posted Yesterday

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Hiring Remotely in Yishun, SGP

Remote

Senior level

Software • Semiconductor • Manufacturing

The Role

Perform full-chip ASIC physical design (RTL-to-GDS or Gates-to-GDS) for 100–400M gate designs on advanced nodes (7nm–2nm) using commercial and in-house EDA tools. Responsibilities include placement, CTS, routing, physical and formal verification, timing analysis, and scripting/automation in UNIX/Linux environments.

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Job Description:

Skills and responsibilities:

Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Able to handle a full RTL to GDS or Gates to GDS flow, inclusive of all construction stages (e.g. Placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis).
Some knowledge of front end design and synthesis is advantageous
Proficiency in UNIX/Linux and scripting languages, e.g. tcl, bash

Required Qualifications:

Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
Minimum of 5 years or more experience in a relevant field.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

Degree (MS or PhD) in Electrical, Electronics, or Computer Engineering
Minimum 5 years relevant ASIC physical design experience
Experience with commercial and in-house EDA tools (Synopsys, Cadence, Siemens)
Experience designing and implementing 100–400M gate ICs at 7nm/5nm/3nm/2nm nodes
Ability to execute full RTL-to-GDS or Gates-to-GDS flow (placement, CTS, routing, physical verification, formal verification, timing analysis)
Proficiency in UNIX/Linux and scripting (tcl, bash)
Some knowledge of front-end design and synthesis

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.