ASIC Design Verification Engineer

Posted 4 Hours Ago
Be an Early Applicant
2 Locations
In-Office
122K-195K Annually
Senior level
Software • Semiconductor • Manufacturing
The Role
Design and verify high-speed ASICs for Ethernet and PCIe datacenter products. Responsibilities include architecture definition, RTL coding, simulation, verification, synthesis, timing closure, and silicon validation. The engineer will collaborate with worldwide design and architecture teams, contribute to front-end development, document technical work, and potentially provide technical leadership. Strong communication, scripting, and teamwork skills are required.
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Job Description:

Would you like to conceive and develop leadership silicon technology for datacenter and other cloud operators?  Come join the team creating technology that fuels AI, and cloud mega data centers.  Be part of developing our next generation product in a series of high throughput Ethernet products that deliver unprecedented performance at critically important power efficiency.


We are looking for engineers that want to create new designs that can evolve rapidly over the next several generations in a very dynamic market. You can become a member of an extremely skilled and efficient group of engineers working on PCIe and other host interfaces. This is a rare opportunity to be part of an emerging product line, the lead product for a new line of devices. The candidate will work with our worldwide design and architecture team, to develop a new world class device. All aspects of front end design will be involved, along with opportunities for technical leadership.


BSEE and 8+ years of industry experience in high speed communication chip architecture and RTL design or MSEE and 6+ years of industry experience.  Strong knowledge & background in either  ethernet controller or PCIe, is highly desired.  Hands-on experience in the ASIC design process; including architecture definition, RTL coding, simulation/verification, synthesis, timing closure, and silicon validation are required.  Must have strong communication and documentation skills and have scripting skills using either Python/Perl.  Must be a self-starter and a strong team player.


Open to hiring in Irvine, CA, San Jose, or Richmond BC, Canada.



Compensation and Benefits


The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • BSEE with 8+ years of industry experience in high-speed communication chip architecture and RTL design
  • MSEE with 6+ years of industry experience in high-speed communication chip architecture and RTL design
  • Strong knowledge and background in Ethernet controllers or PCIe
  • Hands-on experience with the ASIC design process, including architecture definition, RTL coding, simulation and verification, synthesis, timing closure, and silicon validation
  • Scripting skills using Python or Perl
  • Strong communication and documentation skills
  • Self-starter and strong team player

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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