Senior Mixed-Signal ASIC Design Engineer

Posted 9 Days Ago
Be an Early Applicant
2 Locations
Senior level
Semiconductor • Manufacturing
The Role
Responsible for designing custom circuit layouts in advanced nodes, performing DRC and LVS checks, creating block views, and automating various layout tasks with scripting. Collaborates with the Physical Design team to establish interfaces and ensure proper integration of custom blocks with digital components.
Summary Generated by Built In

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Job Description

Senior Mixed-Signal ASIC Design Engineer

Business Line Description:

TEL's new Integrated Circuit Design Solutions (ICDS) team is seeking a Senior Mixed-Signal ASIC Design Engineer to implement cutting-edge ICs in the latest advanced-node technologies. This engineer will be responsible for designing, verifying, and physically implementing mixed-signal blocks. Successful candidates have experience in advanced-node designs and are comfortable creating automation scripts with Python and Tcl.

Job Summary:

  • Create mixed-signal block specifications based on system requirements
  • Design and lay out mixed-signal blocks with custom design tools
  • Verify mixed-signal blocks with analog and digital simulators
  • Generate views of custom blocks for PD integration
  • Automate design and layout tasks using Python or Tcl

Job Qualifications:

  • B.S. (or equivalent) in Electrical Engineering or Computer Engineering required
  • B.S. with 8 years of experience or M.S. with 6 years of experience required.
  • Good understanding of mixed-signal ASIC design flows required
  • Good understanding of Python and Tcl scripting languages required
  • Experience with custom EDA tools required
    • Custom design: Virtuoso, Custom Compiler
    • Analog simulation: HSPICE, Spectre
    • Physical verification: PVS, Calibre, ICValidator
  • Experience with digital EDA tools desired
    • Synthesis: Genus, Design Compiler
    • Static timing analysis: Primetime, Certus
    • Digital simulation: VCS, Xcelium
    • Physical design: Innovus, ICCII
  • Experience with RTL design desired
  • Experience with scientific Python libraries (numpy, pandas, matplotlib, etc) desired
  • Excellent verbal and written communication skills

Onsite Job Location:

  • Austin, TX

Diversity creates an innovative culture. TEL US is an Equal Employment Opportunity / Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, national origin, protected veteran status, disability status, sexual orientation, gender identity or expression, marital status, genetic information, or any other characteristic protected by law.

Diversity creates an innovative culture. TEL US is an Equal Employment Opportunity / Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, national origin, protected veteran status, disability status, sexual orientation, gender identity or expression, marital status, genetic information, or any other characteristic protected by law.

SubsidiaryTOKYO ELECTRON AMERICA, INC.

Top Skills

Python
Tcl
The Company
2,914 Employees
On-site Workplace
Year Founded: 1963

What We Do

Since its founding in 1963, TEL has grown to encompass many offices around the world that engineer, manufacture, sell, and service wafer-processing or semiconductor production equipment (SPE), as well as flat panel display (FPD) and thin-film silicon photovoltaic equipment (PVE). As the world market share leader in several product lines, TEL plays a key role in the evolving global semiconductor industry.

Follow us on Twitter @TokyoElectronUS

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