ASIC Design Engineer Intern

Posted 3 Days Ago
Be an Early Applicant
Headquarters, AZ, USA
In-Office
Internship
Artificial Intelligence • Computer Vision
The Role
Design and verify ASIC logic for edge AI vision processors, including video compression, image processing, neural-network accelerators, and processor cores. Develop RTL in Verilog and SystemVerilog, optimize designs for timing, area, and power, and create UVM-based testbenches, BFMs, test generators, coverage monitors, and verification plans. Support synthesis, front-end tool flows, chip bring-up, and testing.
Summary Generated by Built In
AI Vision Processors For Edge ApplicationsOur solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Job Description

Position Responsibilities:

  • Designing and implementing video compression logic, image processing logic, neural network and AI accelerator logics, and processor cores, in Verilog and System Verilog.
  • Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages.
  • Synthesize and optimize RTL for timing, area and power.
  • Developing unit level and cluster level test-benches, BFMs, random test generators, functional coverage monitors, using System Verilog, UVM, C++, and Perl scripts.
  • Developing test plan, random and directed test cases, performing logic verification, and functional coverage analysis.
  • Developing front-end methodologies and tool flows.
  • Participating in chip bring-up and testing.

Requirements:

  • Master’s degree in Electrical/Electronics/Computer Engineering with 0-5 years of experience.
  • Good understanding of computer architecture, logic design and VLSI design.
  • Knowledge of System Verilog, Verilog, and Perl.
  • Knowledge of design verification, and functional coverage.
  • Ability to program scripting languages and the ability to write assembly language programs.
  • Strong communication skills and a good team player.
  • Knowledge of logic synthesis and timing closer

Skills Required

  • Master's degree in Electrical, Electronics, or Computer Engineering
  • 0-5 years of experience
  • Understanding of computer architecture, logic design, and VLSI design
  • Knowledge of SystemVerilog, Verilog, and Perl
  • Knowledge of design verification and functional coverage
  • Ability to program scripting languages and write assembly language programs
  • Strong communication skills and ability to work effectively in a team
  • Knowledge of logic synthesis and timing closure
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The Company
HQ: Santa Clara, CA
658 Employees
Year Founded: 2004

What We Do

Ambarella (Nasdaq: AMBA) is a leading developer of visual AI products. Our technologies enable a wide variety of human and computer vision applications, including video security, advanced driver assistance systems (ADAS), electronic mirror, drive recorder, driver/cabin monitoring, autonomous driving, and robotic applications. Ambarella’s low-power system on chips (SoCs) offer high-resolution video compression, advanced image processing, and powerful deep neural network processing to enable intelligent cameras to extract valuable data from high-resolution video streams. For more information, please visit www.ambarella.com

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