Application Engineering Intern – AI-based Formal Verification (f/m/d)

Posted 3 Hours Ago
Be an Early Applicant
Feldkirchen, Bayern, DEU
In-Office
Internship
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Work as an intern developing and evaluating LLM/ML approaches for formal verification workflows: analyze data, prototype solutions with R&D, integrate tools, and produce technical documentation and presentations.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.About the Role

At Cadence, we are committed to driving innovation in electronic design and verification technologies. We are seeking a highly motivated Software Engineering Intern to join our Application Engineering team.

In this role, you will contribute to the exploration and development of AI/ML-driven approaches to enhance formal verification workflows, working closely with experienced engineers on cutting-edge challenges in semiconductor design and verification.

What You Will Do
  • Contribute to the development and evaluation of LLM/ML-based approaches for formal verification workflows
  • Analyse technical data and extract meaningful insights to support verification use cases
  • Collaborate with experienced engineers to prototype and validate new concepts
  • Develop and present results, including technical documentation and reports
  • Support the integration of new solutions into existing verification workflows
  • Work closely with R&D teams to refine problem statements and advance innovative solutions
What We Are Looking For (Essential)Education & Technical Skills
  • Currently pursuing a degree in Electrical/Electronic Engineering, Computer Science, or Computer Engineering
  • Fundamental programming skills in Python
  • Basic understanding of machine learning, generative AI, and data analysis
  • Basic understanding of formal verification concepts
  • Familiarity with Linux/Unix environments and scripting
Core Competencies
  • Interest in applying AI/ML techniques to real-world semiconductor challenges
  • Strong analytical and problem-solving skills
  • Good communication skills and ability to work in a collaborative environment
  • Proactive, solution-oriented mindset
Nice to Have (Preferred)
  • Fundamental understanding of VLSI and IC design and HDLs like SystemVerilog
  • Exposure to hardware formal verification tools such as Jasper
  • Experience verifying simple RTL designs using formal techniques
  • Familiarity with data processing frameworks or machine learning libraries
Career Benefits and Growth

Join a team at the forefront of AI-driven innovation in functional verification. This internship provides the opportunity to:

  • Work on impactful, real-world engineering challenges
  • Gain hands-on experience with advanced verification and AI technologies
  • Collaborate with experts in both AI/ML and semiconductor verification
  • Contribute to solutions used across the global semiconductor industry
Benefits We Offer
  • Fair internship compensation
  • Housing allowance for interns from abroad
  • 30 days annual leave
  • Meal vouchers
  • Public transport ticket
  • Hybrid working model in a modern office environment
Apply Today

If you are passionate about AI and eager to contribute to next-generation verification solutions, we would love to hear from you.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Currently pursuing a degree in Electrical/Electronic Engineering, Computer Science, or Computer Engineering
  • Fundamental programming skills in Python
  • Basic understanding of machine learning and generative AI
  • Basic understanding of formal verification concepts
  • Familiarity with Linux/Unix environments and scripting
  • Interest in applying AI/ML techniques to semiconductor verification
  • Strong analytical and problem-solving skills
  • Good communication skills and ability to work collaboratively
  • Proactive, solution-oriented mindset
  • Fundamental understanding of VLSI and IC design and HDLs like SystemVerilog
  • Exposure to hardware formal verification tools such as Jasper
  • Experience verifying simple RTL designs using formal techniques
  • Familiarity with data processing frameworks or machine learning libraries

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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