Analog Mixed-Signal Design Senior Principal Engineer

Job Posted 16 Days Ago Posted 16 Days Ago
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Santa Clara, CA
190K-285K
Expert/Leader
Semiconductor
We create custom semiconductor solutions that move, process, store, and secure data quickly and reliably.
The Role
Lead an analog team for high-speed wireline communication designs. Responsibilities include design execution, team leadership, system engagement, and post-silicon validation.
Summary Generated by Built In

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell's Central Engineering organization provides the most advanced and key analog IPs to all businesses within Marvell: including Data Center, Networking, Automotive, Storage, Security. You’ll be part of a key analog team that makes an outsized impact not only for the organization but also to the technological arc of innovation for future generations of Marvell's high-speed wireline and optical products.

What You Can Expect

As an Analog IC Design Senior Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group, leading an analog team working on the design of advanced circuits for future generations of Marvell's high-speed wireline and optical products.  As such, you will have the opportunity to make a tremendous impact on this organization. 

  • Direct leadership of teams of analog mixed-signal design engineers active in the field of high-speed wireline communications
  • Responsible for design execution, quality of deliverables, and schedule.
  • Engage with system and architecture teams in identifying the optimal circuit solution based on overall cost function and risk. 
  • Supervise the design of ADCs, DACs, Regulators, Clock Generation and Distribution, DLLs, Custom high-speed digital circuits, CTLE, VGA, and TX Drivers.
  • Closely engage with cross-functional teams (RTL, FW, DV, PD) to ensure successful project execution. 
  • Drive post-silicon testing and validation of analog mixed-signal circuits.
  • Maintain detailed documentation of design processes and results.
  • Drive design reviews to ensure design quality and compliance with project requirements.
  • Continuous improvement of execution efficiency and quality of results

What We're Looking For

  • Proven multi-year experience in leading multi-disciplinary projects with teams of 20+ people, ensuring effective team performance and project success.
  • Excellent experience in analog mixed-signal design for high-speed wireline communications, specifically in several of the following areas: ADC, DAC, voltage regulators, clock generation and distribution circuits, DLLs, custom high-speed digital circuits, CTLE, VGA, and TX drivers.
  • Excellent knowledge in advanced CMOS technologies, including knowledge of trade-offs and optimization techniques for performance and power efficiency.
  • Multi-year experience in post-silicon validation, including hands-on experience with lab equipment, debugging, and characterization of analog mixed-signal circuits.
  • Demonstrated success in bringing multiple silicon designs to production.
  • Strong communication skills and excellent ability to work collaboratively with cross-functional teams.
  • Ability to identify, analyze, and resolve complex design issues, ensuring robust and reliable circuit performance.
  • Excellent understanding of related areas such as RTL, Firmware, Design Verification, Design for Test, and Physical Design.

Expected Base Pay Range (USD)

190,460 - 285,300, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

#LI-TD1

Top Skills

Adc
Analog Mixed-Signal Design
Clock Generation
Cmos Technologies
Dac
Dlls
Voltage Regulators
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The Company
HQ: Santa Clara, CA
6,500 Employees
Hybrid Workplace
Year Founded: 1995

What We Do

Marvell specializes in semiconductor solutions that power a wide range of industries, from data centers and 5G networks to AI, automotive, and storage applications. Our cutting-edge products are designed to meet the constantly evolving demands of a connected world, enabling faster, more efficient and more secure data processing and communication. With a focus on excellence and a commitment to advancing technology, we develop solutions that drive progress and transform industries.

Why Work With Us

Life at Marvell means being a part of new innovation and enduring technology; but it's also much more. Our diverse community is strengthened through cultural events, corporate gatherings and team-building activities, fostering collaboration and making work enjoyable. At Marvell, it's not just a job; it's an enriching, community-driven experience.

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