Analog Layout Engineer

Posted Yesterday
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Hiring Remotely in TX, USA
Remote
Senior level
Artificial Intelligence • Cloud • Information Technology • Internet of Things • Software
The Role
Designs high-speed analog and mixed-signal IC physical layouts for advanced CMOS and FinFET nodes. Responsibilities include block and chip-level floorplanning, hierarchical integration, micro-bump and package-aware co-design, parasitic and noise control, device matching, shielding, guard rings, and closure of DRC, LVS, ERC, antenna, EM/IR, and ESD requirements. TSMC 4nm experience is mandatory, with N3 or N5 experience considered critical.
Summary Generated by Built In

Hello,

Job Title : Analog Layout Engineer

Client: Arrow Electronics

Experience Required: 7+ years (Relevant)

Work Location: Austin ,TX (Remote)

Visa: All visa, except H1B transfer

C2C engagements are allowed.

TSMC 4NM (Must Have)

High-Speed Analog Layout Engineer designs the physical silicon layout for high-frequency or high-speed mixed-signal circuits (such as SerDes, ADCs, DACs, PLLs, and High speed blocks).

Floor Planning & Integration: Create block-level and chip-top-level floor plans, manage hierarchical block integration, and handle micro-bump or package-aware co-design

Parasitic & Noise Control: Address layout-dependent effects (LOD, WPE, LDE), device matching, common-centroid structures, guard rings, and isolation or shielding (coaxial, differential, ground shields). [1, 2, 3]

Reliability & Verification: Ensure complete closure on DRC (Design Rule Check), LVS (Layout Versus Schematic), ERC, antenna rules, EM/IR (Electromigration / Infrared drop) reliability, and ESD protection

Generally 5 to 12+ years of hands-on custom IC layout experience in deep sub-micron or advanced CMOS/FinFET nodes (such as TSMC N3, N5, N7)

Experience at Lower node (N3, N5) is critical for this position.

Skills Required

  • 7+ years of relevant analog or custom IC layout experience
  • Hands-on custom IC layout experience in deep-submicron or advanced CMOS/FinFET nodes
  • TSMC 4nm experience
  • Experience with lower-node technologies such as TSMC N3 or N5
  • High-speed analog or mixed-signal layout experience, including circuits such as SerDes, ADCs, DACs, PLLs, or other high-speed blocks
  • Experience with floorplanning, hierarchical block integration, and micro-bump or package-aware co-design
  • Experience controlling parasitics and noise, including LOD, WPE, LDE, device matching, common-centroid structures, guard rings, isolation, and shielding
  • Experience closing DRC, LVS, ERC, antenna, EM/IR, and ESD requirements
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The Company
HQ: Redmond, WA
52 Employees
Year Founded: 2006

What We Do

WHO Founded in 2006 and headquartered in Redmond, WA. Our Senior Leadership team has more than 137 years of combined experience in the Telecommunications and Software Industry. Inabia is built on family values and close-knit culture. This commitment extends to the relationships we build with both our employees and our business partnerships. As a Minority Certified business, we strive to positively impact society through technology, people, and innovation. WHAT For over a decade, we have been providing powerful IT and business solutions to individuals and businesses alike. Here at Inabia, we believe that our success reflects our clients’ success. HOW We are fortunate to be situated in a city where technology and innovation is not only appreciated; but part of day to day lives. We are a growing company that has adapted and evolved our approach, helping us to exceed the ever-changing needs and requirements of our clients. WHY We are a company that fosters and values relationships, as a result many of our clients have been with us from the start of our journey. We ensure that our partners have access to best-in-class professional support, management consulting and staffing services. We make sure our consultants are carefully screened and selected based on their experience. This process ensures that we meet or exceed the specific needs of our clients.

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