Analog IC Design Engineer

Posted Yesterday
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Stansted, Tonbridge and Malling, Kent, England, GBR
In-Office
Entry level
Internet of Things • Semiconductor
The Role
Design and deliver analogue and mixed-signal blocks (TIAs, laser drivers) for high-speed ICs up to 200G. Collaborate with layout, verification, test, and product teams to meet performance, power, area, and reliability targets through simulation, lab validation, and design reviews.
Summary Generated by Built In

Location: Stansted
Working Model: Hybrid (Office: Mon - Thurs)
 

Our Team:

Semtech Corporation is a global leader in high-performance analog and mixed-signal semiconductors, delivering advanced solutions that enable next-generation infrastructure, industrial systems, consumer electronics, and communications technologies.

With over 60 years of innovation, Semtech develops differentiated semiconductor platforms recognised for performance, efficiency, and scalability across a wide range of end markets including data centres, automotive, IoT, wireless infrastructure, and passive optical networks.
 

This role sits within a world-class IC development team based in Stansted (UK) and Ottawa (Canada), working on high-speed transimpedance amplifier (TIA) and laser driver (LD) ICs supporting data rates up to 200G. These technologies are fundamental to enabling continued growth in data centres, 5G networks, and fibre-to-the-home applications.
You will report into the Design Centre Manager and contribute directly to the development of next-generation high-speed analogue IC products from concept through to volume production.


Job Summary:

As an Analog IC Design Engineer, you will contribute directly to the design and development of complex analogue and mixed-signal subsystems across multiple high-speed IC programmes.
You will apply strong circuit-level design expertise to deliver robust, high-performance solutions while supporting the definition and optimisation of chip architecture to meet demanding performance, power, and area targets.

You will work closely with senior design engineers and cross-functional teams to ensure successful execution from concept through design, validation, and production.


Responsibilities:
  • Work closely with the Design Lead to support chip development and take ownership of key analogue subsystems within larger IC programmes (20%).
  • Deliver circuit and block-level analogue designs that meet performance, power, area, and reliability specifications defined by Product Definition and Marketing teams (20%).
  • Collaborate closely with Layout Engineering teams to ensure post-layout performance alignment, including parasitic awareness and design optimisation (15%).
  • Support end-to-end verification activities, ensuring simulated performance correlates with lab measurements during validation and bring-up phases (10%).
  • Work cross-functionally with Marketing, Product Definition, Test, Verification, Reliability, and Product Engineering teams to ensure design alignment with system requirements (10%).
  • Contribute to innovative circuit solutions and continuous improvement of analogue design methodologies and architectures (10%).
  • Communicate and present technical work clearly and effectively to internal engineering teams and wider project stakeholders (10%).
  • Support design reviews and contribute to technical discussions, ensuring high-quality engineering outputs and adherence to programme schedules (5%).

Minimum Qualifications:
  • Bachelor’s degree in Electrical Engineering or related technical discipline required
  • 0–2 years of relevant industry experience in Analog IC design required
  • Strong understanding of CMOS/BiCMOS analog circuit design principles and semiconductor device physics
  • Good technical grounding in circuit theory, device behaviour, and design trade-offs (performance, power, area)
  • Experience using Cadence design and simulation tools
  • Strong written and verbal communication skills in English

Desired Qualifications:
  • Master’s degree (MSc) or specialised analog IC design training preferred
  • Exposure to RF / high-speed analog design (10GHz+) preferred
  • Experience with Laser Driver and/or TIA circuit design preferred
  • Understanding of RF/analog layout principles including floorplanning, parasitics, matching, ESD, crosstalk, and IR drop
  • Exposure to high-frequency passive design (e.g. inductors, T-coils) and 3D modelling techniques
  • Knowledge of device modelling (Verilog-AMS, SystemVerilog or equivalent)
  • Understanding of DFM, yield optimisation, and semiconductor reliability principles
     
Important Qualities:
  • Structured thinking with strong attention to detail
  • Clear and confident communication skills, both written and verbal
  • Collaborative mindset with ability to contribute within multidisciplinary teams
  • Willingness to challenge ideas constructively and engage in technical debate
  • Self-motivated with strong drive for technical excellence and continuous learning

Career Growth Philosophy:

At Semtech, we seek innovation and leadership from every member of our team. We invest in our people with the support, resources, and opportunity to excel — and we recognise and reward those who drive results.
This role provides a strong foundation for technical development in high-speed analog IC design, with clear opportunities to grow within a world-class engineering organisation.
 

Additional Notes:

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform additional job-related tasks as needed.

All duties and responsibilities are essential job functions and may be adjusted to reasonably accommodate individuals with disabilities.

Skills Required

  • Bachelor's degree in Electrical Engineering or related technical discipline
  • 0-2 years of relevant industry experience in Analog IC design
  • Strong understanding of CMOS/BiCMOS analog circuit design principles and semiconductor device physics
  • Good technical grounding in circuit theory, device behaviour, and design trade-offs (performance, power, area)
  • Experience using Cadence design and simulation tools
  • Strong written and verbal communication skills in English
  • Master's degree (MSc) or specialised analog IC design training
  • Exposure to RF / high-speed analog design (10GHz+)
  • Experience with Laser Driver and/or TIA circuit design
  • Understanding of RF/analog layout principles including floorplanning, parasitics, matching, ESD, crosstalk, and IR drop
  • Exposure to high-frequency passive design (e.g. inductors, T-coils) and 3D modelling techniques
  • Knowledge of device modelling (Verilog-AMS, SystemVerilog or equivalent)
  • Understanding of DFM, yield optimisation, and semiconductor reliability principles

Semtech Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Semtech and has not been reviewed or approved by Semtech.

  • Parental & Family Support Up to 20 weeks of paid maternity/parental leave is highlighted in multiple regions. Enhanced leave is positioned as a core part of the package.
  • Healthcare Strength Medical, dental, and vision coverage are standard elements of the offering. Core health coverage features prominently alongside other benefits.
  • Leave & Time Off Breadth Paid vacation and time‑off programs are explicitly included. Time off is emphasized together with flexible/hybrid work policies where possible.

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The Company
HQ: Camarillo, CA
1,475 Employees
Year Founded: 1960

What We Do

Semtech Corporation is a high-performance semiconductor, IoT systems and Cloud connectivity service provider dedicated to delivering high quality technology solutions that enable a smarter, more connected and sustainable planet.

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