Analog IC Design Engineer, Senior Principal Engineer

Reposted 23 Hours Ago
Be an Early Applicant
Toronto, ON, CAN
In-Office
192K-255K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
We create custom semiconductor solutions that move, process, store, and secure data quickly and reliably.
The Role
Lead analog IC design for CMOS transceivers, SerDes, PLLs and data converters. Drive architectural decisions, implement/verify circuits (PLL, DLL, ADC, regulators, TX/RX, CDRs), manage analog design team, coordinate layout/verification/application, perform pre-tapeout validation and lab chip bring-up using industry tools.
Summary Generated by Built In

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

This is an existing vacancy.

Your Team, Your Impact

Central Engineering - AMS IP

What You Can Expect

Seeking a Principal Analog IC Designer to be part of a Marvell's central engineering team designing highly sophisticated CMOS transceiver/SERDES/PLL products. Responsibilities would span architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc.
 

In this role, successful candidate will lead a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog IP to successfully bring designs from concept to production.

What We're Looking For

Master’s degree and/or PhD Preferred in Electrical Engineering or related fields with 10+ years of experience. A successful candidate should have experience in some of the following designs:

  • PLL, Data Converters, Oscillators and high-speed SerDes design including Receiver and Transmitter design.
  • Experience in Single-ended High Density Parallel Interface for Chip to Chip Communication, DDR5/LPDDR5; GDDR6/LPDDR6 a plus
  • Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
  • Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
  • Good understanding of analog layouts in FinFet and its effect on high-speed designs
  • Experienced in system level pre-tape out analog validation
  • Experienced in lab chip bring-up and debugging efforts
  • Strong communication skills

Expected Base Pay Range (CAD)

191,600 - 255,400, $ per annum

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Marvell may employ artificial intelligence technologies to assist in the evaluation of job applications. All application reviews include meaningful human involvement, and no hiring decisions are made solely on the basis of automated processing.

#LI-TD1

Skills Required

  • 10+ years of experience in analog IC design
  • Master's degree and/or PhD in Electrical Engineering or related field
  • Experience designing PLLs, data converters, oscillators and high-speed SerDes (RX/TX)
  • Experience with single-ended high density parallel interfaces and chip-to-chip communication (DDR5/LPDDR5); GDDR6/LPDDR6 a plus
  • Proficiency with analog design and verification tools: Virtuoso, Spectre, ADE and post-layout extraction tools
  • Knowledge of signal integrity improvement, noise reduction and multi-GHz low-jitter clock generation and distribution
  • Good understanding of analog layouts in FinFET and effects on high-speed designs
  • Experience in system-level pre-tapeout analog validation
  • Experience in lab chip bring-up and debugging
  • Strong communication skills

Marvell Technology Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Marvell Technology and has not been reviewed or approved by Marvell Technology.

  • Equity Value & Accessibility Equity appears to be a meaningful part of total rewards through RSUs and an ESPP with a 15% discount and lookback, which can materially raise overall compensation. Stock upside is positioned as a key differentiator when company performance is strong.
  • Parental & Family Support Paid parental/bonding leave is described as substantial, with additional disability leave for birthing parents and a flexible return-to-work program. Family-care leave, generous bereavement provisions, and family-building support (e.g., adoption/surrogacy reimbursement) further strengthen the package.
  • Healthcare Strength Medical coverage is presented as broad with multiple plan options and preventive care covered at 100% in-network, alongside dental, vision, and structured mental-health support. Additional programs like telehealth and specialized care partners add depth to the health offering.

Marvell Technology Insights

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The Company
HQ: Santa Clara, CA
6,500 Employees
Year Founded: 1995

What We Do

Marvell specializes in semiconductor solutions that power a wide range of industries, from data centers and 5G networks to AI, automotive, and storage applications. Our cutting-edge products are designed to meet the constantly evolving demands of a connected world, enabling faster, more efficient and more secure data processing and communication. With a focus on excellence and a commitment to advancing technology, we develop solutions that drive progress and transform industries.

Why Work With Us

Life at Marvell means being a part of new innovation and enduring technology; but it's also much more. Our diverse community is strengthened through cultural events, corporate gatherings and team-building activities, fostering collaboration and making work enjoyable. At Marvell, it's not just a job; it's an enriching, community-driven experience.

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