The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is responsible for delivering industry defining analog and mixed signal IP for Intel's Client, Datacenter, AI and Foundry customers. The IO team owns high-speed serial IO and die-to-die interfaces across multiple advanced process nodes. As an Analog Design Engineer at Intel, you will play a pivotal role in developing cutting-edge analog circuits for advanced process nodes, contributing directly to the innovation and excellence of our analog and mixed-signal IPs. Your work will shape the performance, power efficiency, and area optimization of design solutions, enabling Intel to deliver industry-leading products. Working collaboratively with cross-functional teams, you will impact the company's success by driving advancements in circuit design and validation and empowering products that redefine technology standards.
Key Responsibilities
• Design, develop, and build analog circuits for analog and mixed-signal IPs in advanced process nodes.
• Perform circuit analysis using SPICE simulation tools (Cadence, Synopsys, LTSpice, etc.).
• Develop and implement test plans to validate designs against circuit and block microarchitecture specifications.
• Support layout activities and work closely with layout engineers to optimize circuit performance.
• Participate in design reviews and contribute to technical documentation.
• Collaborate with cross-functional teams including architecture, logic design, validation, and SOC partners.
• Perform circuit simulations and debug to ensure power integrity, signal integrity, and leakage reduction.
• Conduct rigorous evaluation of simulation results to optimize circuit designs for power and performance.
• Provide regular reports on design progress to key stakeholders, ensuring transparency and alignment across teams.
• This is an on-site role and you are expected to work in the office at least 4 days per week.
You are a competitive candidate for this job if you possess these skills and competencies:
• Strong analytical and problem-solving skills.
• Ability to work independently, analyze and making design trade-offs of analog building blocks at transistor level.
• Strong communication skills and ability to provide critical feedback constructively.
Intel offers a collaborative environment where you can grow your expertise, work with industry-leading professionals, and contribute to innovative solutions that drive technological advancements. Join us and be part of a team that makes a global impact.
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Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3 or more years of experience in circuit design, or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 2 or more years of experience in circuit design.
The years of experience must include:
• Circuit simulation tools and analog behavior modeling.
• Familiarity with signal and power integrity, and layout understanding for analog circuits.
• Knowledge of TX/RX blocks, I/O fundamentals, and core analog design principles, including noise, linearity, matching, and stability.
• Cadence analog IC design tools.
Preferred Qualifications:
• IP top level design experience - Floor Planning, Power Delivery, ESD, Bump Map, Top Level Sims, Signal Integrity
• Advanced problem-solving skills with a disciplined approach to execution.
• Experience in group problem-solving and working collaboratively across teams.
• Experience integrating performance, power, and area optimization into circuit designs.
• Experience in analog IC design.
• Mixed-signal design.
• Knowledge of layout considerations for analog circuits.
• Experience with scripting languages (Python, MATLAB, etc.).
• Understanding of statistical analysis and design for manufacturability.
Preferred qualifications may be obtained through a combination of work experience, internships, or academic coursework
Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 3+ years of circuit design experience OR Master's degree with 2+ years
- Experience with circuit simulation tools and analog behavior modeling (SPICE simulation)
- Familiarity with signal and power integrity and layout understanding for analog circuits
- Knowledge of TX/RX blocks, I/O fundamentals, and core analog design principles (noise, linearity, matching, stability)
- Experience with Cadence analog IC design tools
- Ability to perform transistor-level analog design, analysis, and make design trade-offs
- Strong analytical and problem-solving skills; ability to work independently
- Strong communication skills and ability to provide constructive technical feedback
- IP top level design experience (floor planning, power delivery, ESD, bump map, top-level sims, signal integrity)
- Experience integrating performance, power, and area optimization into circuit designs
- Analog IC design experience
- Mixed-signal design experience
- Knowledge of layout considerations for analog circuits
- Experience with scripting languages (Python, MATLAB)
- Understanding of statistical analysis and design for manufacturability
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
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