Analog Circuit Design Engineer

Job Details:

Job Description: The Role and Impact: At Intel, Analog Circuit Design Engineers are at the forefront of innovation, shaping the future of Analog and mixed-signal IPs. This critical role involves designing, developing, and optimizing high-speed Analog circuits in advanced process nodes, contributing directly to Intel's industry-leading products and technologies. Key Responsibilities: - Design, develop, and build Analog circuits for advanced process nodes, enabling high-performance and robust functionality. - Perform circuit design, validation, extraction of chip parameters, and simulation of Analog Behaviour models. - Optimize circuits for power efficiency, performance, area, timing, and yield goals. - Create test plans to verify designs against block microarchitecture specifications, evaluating test results for design validation. - Collaborate with cross-functional teams to define design specifications, collect feedback, and resolve design issues. - Conduct layout reviews and ensure optimal placement and routing in collaboration with architecture and layout teams. - Contribute to post-silicon debug and validation efforts to support high-volume manufacturing. - Continuously refine design methodologies and processes to improve turnaround time and design quality.

Qualifications:Minimum Qualifications - Bachelor's degree in electrical engineering or a closely related field. - 3+ years of experience - Proficiency in CMOS design and RC circuit fundamentals. - Experience designing high-speed IO circuits. - Skilled in using tools such as Spectre, Prime-Sim, HSPICE, Virtuoso, ADE, and Custom Compiler or other equivalent schematic and layout editors. - Knowledge of DRC, LVS, and post-layout extraction tools. - Capability to perform measurements and correlate them to simulation results. - Proficiency in modelling and simulating high-speed interface interconnects and channels. Preferred Qualifications - Exposure to high-speed digital circuit design and analysis. - Familiarity with digitally assisted Analog circuits and techniques. - Knowledge of Verilog-A for Analog Behavioural Modelling and proficiency in scripting languages such as TCL, Perl, C, or Python is a plus. - Strong analytical and problem-solving skills.

          

Job Type:Experienced Hire

Shift:Shift 1 (India)

Primary Location: India, Bangalore

Additional Locations:

Business group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.